Similarly, each tiled interconnect transaction that reaches the DMM is subject to the same processing.
The TILER blocks consider separated request, data, and response paths. An overview of each path follows, and more detailed information is in Section 15.2.3.5.3, DMM Internal Macro-Architecture.
On the request path, the processing phase consists of:
- Decoding the address to qualify whether the request targets the TILER or the memory directly
- Transforming TILER-specific requests to their natural representation; the address, width, and height are modified accordingly
On the request path, the generation phase consists of:
- Allocating a TILER response context for the timely generation of the appropriate responses
- Splitting malformed: The request stride differs from the container stride and from the double of this container stride – tiled 2D requests in a collection of 1D requests
- Splitting tiled requests at tile boundaries
- Performing the page-based address translation by use of the PAT block
- Allocating an available buffer in the appropriate ROBIN, for read and write requests
- In case of a write request, allocating and updating a TILER write context to direct the incoming write data into the relevant reordering buffer
- Generating the initiator-indexed priority extension by use of the PEG block
On the data path, any incoming data is transformed in accordance with the corresponding TILER write context and sent to the appropriate reordering buffer.
On the response path, responses are returned when:
- A minimal number of responses have entered the corresponding buffers, in case of read requests.
- All related responses have returned from the SDRCs, in case of write requests.
- No other previous pending response with the same tag exists.