SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
The input configuration words should reflect the parameters of the user-channels to be decoded.
The POLYn bits in VCP_VCPIC0 correspond to the generator polynomials in the encoder (see Figure 32-4). The values in each POLYn bit fields must be entered in reverse order. The POLYn least-significant bit is set by the VCPs logic.
The VCP_VCPIC1[27:16] YAMT and VCP_VCPIC1[28]YAMEN bits are described in Section 32.5.2.
The VCP_VCPIC2[15:0] F and VCP_VCPIC2[31:15] R bits, the VCP_VCPIC3[15:0] C bit, and the VCP_VCPIC5[29:28] TB bits are described in Section 32.5.2.
The VCP_VCPIC5[7:0] IMAXI bit-field determines which state should be initialized with the maximum state metrics value (IMAXS), all the other states are initialized with the minimum state metrics value (IMINS). The IMAXI can range from 0 to 2K-1-1. The IMAXS and IMINS are 13-bit signed values.
The VCP_VCPIC5[19:16] SYMX and VCP_VCPIC5[24:20] SYMR bits are described in Section 32.5.2.
The VCP_VCPIC5[30] OUTF bit indicates whether the VCP should generate a VCPnREVT for reading the output parameters. The OUTF bit setting will impact the EDMA programming (see Section 32.4.1.2.3).