SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
Move Architectural Register to Shadow Register
MVS areg, sreg
Functional unit = S
16 bit
15 | 11 | 10 | 9 | 7 | 6 | 0 |
sreg | 1 | areg | 1 | 0 | 0 | 1 | 0 | 0 | 0 |
5 | 3 | opcode |
The content of the architectural register (areg) is moved to the shadow register (sreg). This instruction has two exposed delay slots, the data written cannot be read back until the third cycle from the cycle when this instruction enters the EXE phase.
None
sreg = areg