SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
To meet the MIR baud rate tolerance of 0.1 percent with a 48-MHz clock input, a 42-41-42 encoding/decoding adjustment is performed. The reference start point is the first start flag, and the 42-41-42 cyclic pattern is repeated until the stop flag is sent or detected.
The jitter created this way is within MIR tolerances. The pulse width is not exactly 1/4, but it is within the tolerances defined by IrDA specifications.
Figure 26-46 shows the MIR baud rate adjustment mechanism.