SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
Table 3-311 lists the clock domain modes supported by the clock domain.
NO_SLEEP | SW_SLEEP | SW_WKUP | HW_AUTO |
---|---|---|---|
Available | Available | Available | Available |
Table 3-312 lists the clock domain state transition control and status bits for the clock in this clock domain.
Parameter Name | Control/Status Bit Field |
---|---|
EVE2_GFCLK Clock Status | CM_EVE2_CLKSTCTRL[8] CLKACTIVITY_EVE2_GFCLK |
Clock Domain State Transition Control | CM_EVE2_CLKSTCTRL[1:0] CLKTRCTRL |