SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
Module Name | Base Address | Size |
---|---|---|
GPMC | 0x5000 0000 | 16 MiB |
Register Name | Type | Register Width (Bits) | Address Offset | Physical Address GPMC |
---|---|---|---|---|
GPMC_REVISION | R | 32 | 0x0000 0000 | 0x5000 0000 |
GPMC_SYSCONFIG | RW | 32 | 0x0000 0010 | 0x5000 0010 |
GPMC_SYSSTATUS | R | 32 | 0x0000 0014 | 0x5000 0014 |
GPMC_IRQSTATUS | RW | 32 | 0x0000 0018 | 0x5000 0018 |
GPMC_IRQENABLE | RW | 32 | 0x0000 001C | 0x5000 001C |
GPMC_TIMEOUT_CONTROL | RW | 32 | 0x0000 0040 | 0x5000 0040 |
GPMC_ERR_ADDRESS | RW | 32 | 0x0000 0044 | 0x5000 0044 |
GPMC_ERR_TYPE | RW | 32 | 0x0000 0048 | 0x5000 0048 |
GPMC_CONFIG | RW | 32 | 0x0000 0050 | 0x5000 0050 |
GPMC_STATUS | RW | 32 | 0x0000 0054 | 0x5000 0054 |
GPMC_CONFIG1_i (1) | RW | 32 | 0x0000 0060 + (0x0000 0030 * i) | 0x5000 0060 + (0x0000 0030 * i) |
GPMC_CONFIG2_i (1) | RW | 32 | 0x0000 0064 + (0x0000 0030 * i) | 0x5000 0064 + (0x0000 0030 * i) |
GPMC_CONFIG3_i (1) | RW | 32 | 0x0000 0068 + (0x0000 0030 * i) | 0x5000 0068 + (0x0000 0030 * i) |
GPMC_CONFIG4_i (1) | RW | 32 | 0x0000 006C + (0x0000 0030 * i) | 0x5000 006C + (0x0000 0030 * i) |
GPMC_CONFIG5_i (1) | RW | 32 | 0x0000 0070 + (0x0000 0030 * i) | 0x5000 0070 + (0x0000 0030 * i) |
GPMC_CONFIG6_i (1) | RW | 32 | 0x0000 0074 + (0x0000 0030 * i) | 0x5000 0074 + (0x0000 0030 * i) |
GPMC_CONFIG7_i (1) | RW | 32 | 0x0000 0078 + (0x0000 0030 * i) | 0x5000 0078 + (0x0000 0030 * i) |
GPMC_NAND_COMMAND_i (1) | W | 32 | 0x0000 007C + (0x0000 0030 * i) | 0x5000 007C + (0x0000 0030 * i) |
GPMC_NAND_ADDRESS_i (1) | W | 32 | 0x0000 0080 + (0x0000 0030 * i) | 0x5000 0080 + (0x0000 0030 * i) |
GPMC_NAND_DATA_i(1) | RW | 32 | 0x0000 0084 + (0x0000 0030 * i) | 0x5000 0084 + (0x0000 0030 * i) |
GPMC_PREFETCH_CONFIG1 | RW | 32 | 0x0000 01E0 | 0x5000 01E0 |
GPMC_PREFETCH_CONFIG2 | RW | 32 | 0x0000 01E4 | 0x5000 01E4 |
GPMC_PREFETCH_CONTROL | RW | 32 | 0x0000 01EC | 0x5000 01EC |
GPMC_PREFETCH_STATUS | RW | 32 | 0x0000 01F0 | 0x5000 01F0 |
GPMC_ECC_CONFIG | RW | 32 | 0x0000 01F4 | 0x5000 01F4 |
GPMC_ECC_CONTROL | RW | 32 | 0x0000 01F8 | 0x5000 01F8 |
GPMC_ECC_SIZE_CONFIG | RW | 32 | 0x0000 01FC | 0x5000 01FC |
GPMC_ECCj_RESULT(2) | RW | 32 | 0x0000 0200 + (0x0000 0004 * j) | 0x5000 0200 + (0x0000 0004 * j) |
GPMC_BCH_RESULT0_i (1) | RW | 32 | 0x0000 0240 + (0x0000 0010 * i) | 0x5000 0240 + (0x0000 0010 * i) |
GPMC_BCH_RESULT1_i (1) | RW | 32 | 0x0000 0244 + (0x0000 0010 * i) | 0x5000 0244 + (0x0000 0010 * i) |
GPMC_BCH_RESULT2_i (1) | RW | 32 | 0x0000 0248 + (0x0000 0010 * i) | 0x5000 0248 + (0x0000 0010 * i) |
GPMC_BCH_RESULT3_i (1) | RW | 32 | 0x0000 024C + (0x0000 0010 * i) | 0x5000 024C + (0x0000 0010 * i) |
GPMC_BCH_RESULT4_i (1) | RW | 32 | 0x0000 0300 + (0x0000 0010 * i) | 0x5000 0300 + (0x0000 0010 * i) |
GPMC_BCH_RESULT5_i (1) | RW | 32 | 0x0000 0304 + (0x0000 0010 * i) | 0x5000 0304 + (0x0000 0010 * i) |
GPMC_BCH_RESULT6_i (1) | RW | 32 | 0x0000 0308 + (0x0000 0010 * i) | 0x5000 0308 + (0x0000 0010 * i) |
GPMC_BCH_SWDATA | RW | 32 | 0x0000 02D0 | 0x5000 02D0 |