SPRUIE9D May 2017 – May 2024 DRA74P , DRA75P , DRA76P , DRA77P
Table 17-471 describes the settings required to prepare the GPMC; that is enabling its clock and pads, and proceeding to a GPMC reset.
Subprocess Name | Register/Bit Field | Value |
---|---|---|
Start a software reset. | GPMC_SYSCONFIG[1] SOFTRESET | 0x1 |
Wait until | GPMC_SYSSTATUS[0] RESETDONE = | 0x1 |