SPRUII0F May 2019 – June 2024 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S
The device clock domains are applied to the clock inputs of the various modules in the device. They are connected to the derived clocks, either directly or through an additional divider. In addition to the clock domains defined in Section 3.7.3, the following clock domains are derived specifically for the CM (Cortex®-M4) Subsystem.