To synchronize or update the system time to reduce system-time jitter (fine correction method), complete the following steps:
- With the help of the algorithm explained in “System Time Register Module”,
calculate the rate that you want the system time increments slower or
faster.
- Update the MAC_Timestamp_Addend with the new value and set Bit 5 of the
MAC_Timestamp_Control Register.
- Wait for the time for which you want the new value of the Addend register to be active. You can do this by enabling the Timestamp Trigger interrupt after the system time reaches the target value.
- Program the required target time in MAC_PPS[n]_Target_Time_Seconds Register and MAC_PPS[n]_Target_Time_Nanoseconds Register.
- Enable the Timestamp interrupt in bit 12 of MAC_Interrupt_Enable register.
- Set bit 4 in Register MAC_Timestamp_Control.
- When this trigger causes an interrupt, read MAC_Interrupt_Status Register.
- Reprogram MAC_Timestamp_Addend Register with the old value and set bit 5 again