SPRUII0F May 2019 – June 2024 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S
Figure 20-24 shows the basic organization of the external voltage reference generation circuitry. TI recommends that a single reference voltage generation source is shared by all ADC modules. This minimizes reference voltage mismatch between ADC modules. For best performance, the externally generated reference voltage must be buffered by a precision op-amp with good bandwidth and low output impedance before being driven into the ADC reference pin. A capacitor between the high and low reference pins must be placed on the PCB as close to the pins as practical to help absorb high-frequency currents. A series resistor (typically <1Ω) in series with this capacitor is sometimes necessary to maintain op-amp stability.
To share two reference pins between one op-amp driver is possible. This organization is shown in Figure 20-25. This can give slightly reduced performance compared to the case where each reference pin has a dedicated op-amp buffer, but can still be possible to achieve all ADC specifications in the data sheet.