SPRUII0F May 2019 – June 2024 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S
32-Bit Floating-Point Multiply with Parallel Move
MRd | CLA floating-point destination register for MMPYF32 (MR0 to MR3) |
MRe | CLA floating-point source register for MMPYF32 (MR0 to MR3) |
MRf | CLA floating-point source register for MMPYF32 (MR0 to MR3) |
mem32 | 32-bit memory location accessed using one of the available addressing modes. This is the destination of MMOV32. |
MRa | CLA floating-point source register for MMOV32 (MR0 to MR3) |
LSW: mmmm mmmm mmmm mmmm
MSW: 0100 ffee ddaa addr
Multiply the contents of two floating-point registers and move from memory to register.
MRd = MRe * MRf;
[mem32] = MRa;
This instruction modifies the following flags in the MSTF register:
Flag | TF | ZF | NF | LUF | LVF |
---|---|---|---|---|---|
Modified | No | No | No | Yes | Yes |
The MSTF register flags are modified as follows:
MMPYF32 and MMOV32 both complete in a single cycle.
; Given A, B, and C are 32-bit floating-point numbers
; Calculate Y2 = (A * B)
; Y3 = (A * B) * C
;
_Cla1Task2:
MMOV32 MR0, @A ; Load MR0 with A
MMOV32 MR1, @B ; Load MR1 with B
MMPYF32 MR1, MR1, MR0 ; Multiply A*B
|| MMOV32 MR0, @C ; and in parallel load MR0 with C
MMPYF32 MR1, MR1, MR0 ; Multiply (A*B) by C
|| MMOV32 @Y2, MR1 ; and in parallel store A*B
MMOV32 @Y3, MR1 ; Store the result
MSTOP ; end of task