SPRUII0F May 2019 – June 2024 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S
As long as each set of SOCs has identical trigger select and ACQPS settings, multiple trigger sources can be used while still achieving synchronous operation.
The following example demonstrates synchronous operation between ADCA and ADCB while using three SOCs and two trigger sources. Figure 20-18 demonstrates that any combination of relative trigger timings still results in synchronous operation.
Example: Synchronous Operation With Multiple Trigger Sources
AdcaRegs.ADCSOC0CTL.bit.CHSEL = 4; //SOC0 converts ADCINA4
AdcaRegs.ADCSOC0CTL.bit.ACQPS = 19; //SOC0 uses sample duration of 20 SYSCLK cycles
AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 10; //SOC0 begins conversion on ePWM3 SOCB
AdcbRegs.ADCSOC0CTL.bit.CHSEL = 0; //SOC0 converts ADCINB0
AdcbRegs.ADCSOC0CTL.bit.ACQPS = 19; //SOC0 uses sample duration of 20 SYSCLK cycles
AdcbRegs.ADCSOC0CTL.bit.TRIGSEL = 10; //SOC0 begins conversion on ePWM3 SOCB
AdcaRegs.ADCSOC1CTL.bit.CHSEL = 4; //SOC1 converts ADCINA4
AdcaRegs.ADCSOC1CTL.bit.ACQPS = 30; //SOC1 uses sample duration of 31 SYSCLK cycles
AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 10; //SOC1 begins conversion on ePWM3 SOCB
AdcbRegs.ADCSOC1CTL.bit.CHSEL = 1; //SOC1 converts ADCINB1
AdcbRegs.ADCSOC1CTL.bit.ACQPS = 30; //SOC1 uses sample duration of 31 SYSCLK cycles
AdcbRegs.ADCSOC1CTL.bit.TRIGSEL = 10; //SOC1 begins conversion on ePWM3 SOCB
AdcaRegs.ADCSOC2CTL.bit.CHSEL = 0; //SOC2 converts ADCINA0
AdcaRegs.ADCSOC2CTL.bit.ACQPS = 19; //SOC2 uses sample duration of 20 SYSCLK cycles
AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 2; //SOC2 begins conversion on CPU Timer1
AdcbRegs.ADCSOC2CTL.bit.CHSEL = 2; //SOC2 converts ADCINB2
AdcbRegs.ADCSOC2CTL.bit.ACQPS = 19; //SOC2 uses sample duration of 20 SYSCLK cycles
AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = 2; //SOC2 begins conversion on CPU Timer1
Note that any trigger source that can be selected in the TRIGSEL field can be used except for software triggering. There is no way to issue the software triggers for all ADCs simultaneously, so likely results in asynchronous operation. ADCINT1 or ADCINT2 can also be used as a trigger as long as the ADCINTSOCSEL1 and ADCINTSOCSEL2 registers are configured identically for all ADCs and software triggering is not used to start the chain of conversions.