SPRUII0F May 2019 – June 2024 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S
The PHY Clock connectivity is shown in Figure 31-4. On this MCU, the user has an option to clock the PHY using the ESCSS_PHY_CLK signal if needed; otherwise, the user can chose to provide an external 25MHz source to the PHY and ESC (both must be clocked from the same source). For more details regarding providing PHY clock, refer to Section 31.2.6.2 and see the EtherCAT data sheet from Beckhoff.