SPRUIQ4 May   2019 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1 , TMS320F28374D , TMS320F28374S , TMS320F28375D , TMS320F28375S , TMS320F28375S-Q1 , TMS320F28376D , TMS320F28376S , TMS320F28377D , TMS320F28377D-EP , TMS320F28377D-Q1 , TMS320F28377S , TMS320F28377S-Q1 , TMS320F28378D , TMS320F28378S , TMS320F28379D , TMS320F28379D-Q1 , TMS320F28379S

 

  1.   Introduction
    1.     Trademarks
    2.     Overview
  2. 1Getting Familiar With the Kit
    1. 1.1 Contents of the Kit
    2. 1.2 IDDK EVM Features
  3. 2Hardware Overview
    1. 2.1  IDDK Evaluation Board
    2. 2.2  Functional Blocks
    3. 2.3  Processor Section
    4. 2.4  Control Processor Slot – H1
    5. 2.5  Expansion Processor Slots
      1. 2.5.1 Real-time Connectivity – H7
      2. 2.5.2 Functional Safety – H8
    6. 2.6  Position Encoder Suite
      1. 2.6.1 QEP
      2. 2.6.2 Resolver
      3. 2.6.3 Sin-Cos Encoder
      4. 2.6.4 BiSS / EnDat Encoder
      5. 2.6.5 TI Design Interface Connector
    7. 2.7  Current Sensor Suite
      1. 2.7.1 Shunt Current Sensing
      2. 2.7.2 LEM Current Sensing
      3. 2.7.3 Sigma-Delta Current Sensing
      4. 2.7.4 Overcurrent Protection
    8. 2.8  Power Supplies and GND Plane Configurations
    9. 2.9  Rectifier and Inverter
      1. 2.9.1 Rectifier Stage
        1. 2.9.1.1 Connecting the External DC Supply to the DC Link
        2. 2.9.1.2 Connecting Rectifier Output to DC Link
      2. 2.9.2 Inverter Stage
    10. 2.10 DACs
    11. 2.11 Power Stage Disable Circuits
  4. 3Hardware Resource Mapping
    1. 3.1 Digital Signal Mapping
    2. 3.2 Analog Signal Mapping
    3. 3.3 Jumpers and Switches
    4. 3.4 Headers and Connectors

3.2 Analog Signal Mapping

Table 3-2 shows the functional mapping of various analog signals connected to control processor on H1.

Table 3-2 Analog Signals and Mapping

IDDK Signal Name MCU Analog Signal Description Reserved
DAC-A A0 Resolver Carrier excitation (option)
DAC-B A1 General-purpose display
Ifb-V A2 Phase V LEM current feedback
Vfb-V A3 Phase V voltage feedback
Ifb-Sv A4 Phase V shunt current feedback
Ifb-Su A5 Phase U shunt current feedback
Vfb-Bus B0 DC-bus voltage from shunts
DAC-C B1 General-purpose display
Ifb-W B2 Phase W LEM current feedback
Vfb-W B3 Phase W voltage feedback
Ifb-Sw B4 Phase W shunt current feedback
------- B5
SC-A-2 ADCIN14 Sin Cos Analog input A √
R-Cos ADCIN15 Resolver cosine feedback
Ifb-Su C2 Phase U shunt current feedback
Vfb-U C3 Phase U voltage feedback
------- C4
------- C5
SC-B-2 D0 Sin Cos Analog input B √
R-Sin D1 Resolver sine feedback
SC-R D2 Sin Cos Analog input R √
------- D3
------- D4
------- D5