SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 10-639 shows the thread numbers for the PSILSS slave endpoints.
PSILSS Instance | Endpoint | Thread Number |
---|---|---|
PDMA_SPI_PSILSS0 | PDMA_SPI_G0 | 0x4600 |
PDMA_SPI_G1 | 0x460C | |
PDMA_USART_PSILSS0 | PDMA_USART_G0 | 0x4700 |
PDMA_USART_G1 | 0x4702 | |
PDMA_USART_G2 | 0x4704 | |
PDMA_MCAN | 0x470C |
Table 10-640 through Table 10-641 provide further details about the source (src) and destination (dst) configuration parameters for the various PSILSS instances, including number of threads per endpoint. Note that the last two columns in each table present the associated source and destination thread numbers in decimal value.
Endpoint | Data Width (Src / Dst) | ETL Count (Src / Dst) | Thread Count (Src / Dst) | Source Thread Map | Destination Thread Map |
---|---|---|---|---|---|
PDMA_STRM | 128-bit / 128-bit | 1 / 1 | 32704 / 32704 | 0 through 18175; 18240 through 32767 | 32K + 0 through 18175; 32K + 18240 through 32767 |
USART_G0_STRM | 128-bit / 128-bit | 1 / 1 | 2 / 2 | 18176 through 18177 | 32K + 18176 through 18177 |
USART_G1_STRM | 128-bit / 128-bit | 1 / 1 | 2 / 2 | 18178 through 18179 | 32K + 18178 through 18179 |
USART_G2_STRM | 128-bit / 128-bit | 1 / 1 | 6 / 6 | 18180 through 18185 | 32K + 18180 through 18185 |
MCAN_STRM | 128-bit / 128-bit | 1 / 1 | 54 / 54 | 18188 through 18239 | 32K + 18188 through 18239 |
Endpoint | Data Width (Src / Dst) | ETL Count (Src / Dst) | Thread Count (Src / Dst) | Source Thread Map | Destination Thread Map |
---|---|---|---|---|---|
PDMA_STRM | 128-bit / 128-bit | 1 / 1 | 32704 / 32704 | 0 through 17919; 17984 through 32767 | 32K + 0 through 17919; 32K + 17984 through 32767 |
SPI_G0_STRM | 128-bit / 128-bit | 1 / 1 | 16 / 16 | 17920 through 17935 | 32K + 17920 through 17935 |
SPI_G1_STRM | 128-bit / 128-bit | 1 / 1 | 16 / 16 | 17936 through 17951 | 32K + 17936 through 17951 |