SPRUIZ2 july   2023 TMS320F28384D , TMS320F28384D-Q1 , TMS320F28384S , TMS320F28384S-Q1 , TMS320F28386D , TMS320F28386D-Q1 , TMS320F28386S , TMS320F28386S-Q1 , TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Feature Differences Between F2838x and F28P65x
    1. 1.1 F2838x and F28P65x Feature Comparison
  5. 2PCB Hardware Changes
    1. 2.1 PCB Hardware Changes for the 176-Pin PTP Package
    2. 2.2 Use of Existing 176-Pin F2838x PCB Design
      1.      9
      2. 2.2.1 JTAG TRSTn No-Connect
      3. 2.2.2 GPIO Input Buffer Control Register
      4. 2.2.3 176-Pin GPIO Pin/Multiplex and ADCD Considerations
        1. 2.2.3.1 176-Pin PTP Pins With Different GPIO Assignment
        2. 2.2.3.2 ADCD Channel Migration
    3. 2.3 176-Pin PTP New PCB Design
    4. 2.4 337-BGA ZWT Application to 256-BGA ZEJ or 169-BGA NMR
  6. 3Feature Differences for System Consideration
    1. 3.1 New Features in F28P65x
      1. 3.1.1  Lock-step Compare Module (LCM)
      2. 3.1.2  Expanded Analog Channels
      3. 3.1.3  Firmware Update (FWU)
      4. 3.1.4  Flexible GPIO and Digital Input Pins
      5. 3.1.5  New ADC Features
      6. 3.1.6  New EPWM Features
      7. 3.1.7  New CMPSS Features
      8. 3.1.8  ADC Hardware Redundancy Safety Checker
      9. 3.1.9  Flexible Memory Sharing between CPU Subsystems
      10. 3.1.10 Increased RAM Program Memory on CLA
    2. 3.2 Communication Module Changes
    3. 3.3 Control Module Changes
    4. 3.4 Analog Module Differences
    5. 3.5 Other Device Changes
      1. 3.5.1 PIE Channel Mapping
        1. 3.5.1.1 F2838x vs F28P65x PIE Channel Mapping Comparison
      2. 3.5.2 Bootrom
      3. 3.5.3 CLB and Motor Control Libraries
      4. 3.5.4 ERAD
      5. 3.5.5 AGPIO Filter
    6. 3.6 Power Management
      1. 3.6.1 VREGENZ
      2. 3.6.2 LDO/VREG
      3. 3.6.3 POR/BOR
      4. 3.6.4 Power Consumption
    7. 3.7 Memory Module Changes
    8. 3.8 GPIO Multiplexing Changes
      1. 3.8.1 F2838x vs F28P65x GPIO Mux Comparison
    9. 3.9 Analog Multiplexing Changes
      1. 3.9.1 F2838x_176PTP vs F28P65x_176PTP Analog Connections Comparison
  7. 4Application Code Migration From F2838x to F28P65x
    1. 4.1 C2000Ware Header Files
    2. 4.2 Linker Command Files
    3. 4.3 C2000Ware Examples
  8. 5References

3.6.2 LDO/VREG

F2838x does not have an internal VREG and only external VREG is supported. F28P65x supports internal and external VREG and is selectable using the VREGENZ pin. VREGENZ pin in F28P65x has an internal pullup which defaults the operation in external VREG mode on the VDD pin if pin is left floating. VREGENZ pin location in F28P65x is a NC (no connect) pin in F2838x devices.