SPRUJ85A April   2024  – August 2024

PRODUCTION DATA  

  1.   1
  2.   Description
  3. 1Key Features
  4. 2LaunchPad Module Overview
    1. 3.1 Introduction
    2. 3.2 Preface: Read This First
      1. 3.2.1 If You Need Assistance
      2. 3.2.2 Important Usage Notes
    3. 3.3 Kit Contents
    4. 3.4 Device Information
      1. 3.4.1 System Architecture Overview
      2. 3.4.2 Security
      3. 3.4.3 Compliance
      4. 3.4.4 BoosterPacks
      5. 3.4.5 Component Identification
  5. 3Hardware Description
    1. 4.1  Board Setup
      1. 4.1.1 Power Requirements
        1. 4.1.1.1 Power Input Using USB Type-C Connector
        2. 4.1.1.2 Power Status LEDs
        3. 4.1.1.3 Power Tree
      2. 4.1.2 Push Buttons
      3. 4.1.3 Boot mode Selection
      4. 4.1.4 IO Expander
    2. 4.2  Functional Block Diagram
    3. 4.3  GPIO Mapping
    4. 4.4  Reset
    5. 4.5  Clock
    6. 4.6  Memory Interfaces
      1. 4.6.1 OSPI
      2. 4.6.2 MMC
      3. 4.6.3 eMMC
      4. 4.6.4 Board ID EEPROM
    7. 4.7  Ethernet Interface
      1. 4.7.1 Ethernet PHY #1 - CPSW RGMII/ICSSM
      2. 4.7.2 Ethernet PHY #2 - CPSW RGMII/ICSSM
      3. 4.7.3 LED Indication in RJ45 Connector
    8. 4.8  I2C
    9. 4.9  Industrial Application LEDs
    10. 4.10 SPI
    11. 4.11 UART
    12. 4.12 MCAN
    13. 4.13 FSI
    14. 4.14 JTAG
    15. 4.15 TIVA and Test Automation Header
    16. 4.16 LIN
    17. 4.17 ADC and DAC
    18. 4.18 EQEP and SDFM
    19. 4.19 EPWM
    20. 4.20 BoosterPack Headers
    21. 4.21 Pinmux Mapping
  6. 4Additional Information
    1.     Trademarks
    2. 5.1 Sitara MCU+ Academy
    3. 5.2 Known Board Changes/Issues
      1. 5.2.1 OSPI DQS and LBCLK nets swap
      2. 5.2.2 XDS110 Debugger Bricking Issue
      3. 5.2.3 eMMC CMD and CLK nets swap
  7. 5References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  8. 6Revision History

3.20 BoosterPack Headers

AM263P AM263Px LaunchPad BoosterPack PinoutFigure 3-31 AM263Px LaunchPad BoosterPack Pinout

Note: This pinout represents the default signals mapped to the BoosterPack Header. Additional signal options for each header are available through Pinmux Mapping. Two signals for one pin represents an externally muxed option

The AM263Px LaunchPad supports two fully independent BoosterPack XL connectors. BoosterPack site #1 (J1/J3, J2/J4) is located in between the SoC and the micro-B USB Connector. BoosterPack site #2 (J5/J7, J6/J8) is located in between the SoC and the RJ45 connectors. Each GPIO has multiple functions available through the GPIO mux. The signals connected from the SoC to the BoosterPack headers include:

  • Various ADC inputs
  • DAC outouts
  • UART5
  • Various GPIO signals
  • SPI0 and SPI1
  • I2C1 and I2C3
  • Various EPWM channels
  • LIN1 and LIN2
  • MCAN1
  • SDFM0