This block allows the user to assign a utilization to each major core IP.

WKUP domain:

• SMS 0 – Arm Cortex-M4F based Security Management Subsystem
• SA3SS 0 – a collection of essential hardware accelerators supporting cryptography

MCU domain:

• Dual-R5F MCU Subsystem

Main domain:

• Dual-A72 MPU Subsystem
• 2x Dual-R5F MCU Subsystems
• C71x DSP Subsystem that includes a Matrix Multiplication Accelerator (MMA)
• C71x DSP Subsystem (standalone)
• SA2_UL is a collection of hardware accelerators supporting cryptography
• Vision Preprocessing Accelerator (VPAC)
• Depth and Motion Processing Accelerator (DMPAC)
• Graphics Processing Unit (GPU)
• Combination Video Encoder and Decoder