A UART is an integrated circuit used for TTL serial communications. A UART contains a transmitter (parallel-to-serial converter) and a receiver (serial-to-parallel converter).
The CC23xx device includes a fully programmable UART. The UART can generate individually masked interrupts from the receive (RX), transmit (TX), modem flow control, and error conditions. The module generates one combined interrupt when any interrupts are asserted and unmasked.
The UART has the following features:
- Programmable baud rate generator allowing speeds up to 3Mbps
- Separate 8 × 8 transmit (TX) and 8 × 12 receive (RX) first-in-first-out (FIFO) buffers to reduce CPU interrupt service loading
- RX/TX FIFOs can be reconfigured to a 16x8b TX FIFO for unidirectional output
- Programmable FIFO length, including 1-byte deep operation providing a conventional double-buffered interface
- FIFO trigger levels of ¼, ½, ¾
- Line-break generation and detection
- Fully programmable serial interface characteristics:
- 5, 6, 7, or 8 data bits
- Even, odd, stick, or no parity bit generation and detection
- 1 or 2 stop-bit generation
- FIFO, RX FIFO RX time-out, modem status, and error conditions
- Standard FIFO-level and end-of-transmission interrupts.
- Efficient transfers using micro direct memory access controller (μDMA)
- Separate µDMA channels for transmit and receive.
- Receive single request asserted when data is in the FIFO; burst request asserted at programmed FIFO level.
- Transmit single request is asserted when there is space in the FIFO; burst request is asserted at the programmed FIFO level.
- Programmable hardware flow control
- Support for standard Infrared Data Association (IrDA) and low-power IrDA protocols
- Provision to combine both TX and RX FIFOs in transmit mode