SWCU193A April 2023 – August 2024 CC2340R2 , CC2340R5 , CC2340R5-Q1
RTC.ARMSET and RTC.ARMCLR are provided as additional methods of arming and disarming channels. A read of either the RTC.ARMCLR or RTC.ARMSET register returns the armed status of each channel. If the capture or compare channel is armed, setting the corresponding bit in the RTC.ARMCLR register to 1 sets the channel in the unarmed state without triggering an event (unless a compare or capture event happens in the same cycle).
If the channel is not armed, writing the RTC.ARMSET[1] CH1 bit arms the capture channel. Writing to RTC.ARMSET[0] CH0 has no effect on the compare channel. The compare channel is automatically armed when a value is written to the RTC.CH0COMP register.