TIDUEY0 November 2020
For cost-optimized systems, instead of the ADS131M08, use the 12-bit on-chip ADC in the feedback. In each PWM cycle 4 current measurements are taken, which is then averaged over 6 PWM cycles. Figure 3-12, Table 3-2, and Table 3-3 show output current error at different output current and voltage levels. It is observed that with a 12-bit ADC feedback, it is possible to achieve ±0.05% current control accuracy.
Vbattery | Iset - Charge Mode | |||
---|---|---|---|---|
0.1 A | 1 A | 5 A | 10 A | |
0.5 | 1.0016 | 0.0984 | 5.01 | 10.025 |
1 | 1.0016 | 0.0984 | 5.01 | 10.023 |
1.5 | 1.0016 | 0.0984 | 5.0089 | 10.023 |
2 | 1.004 | 0.0984 | 5.0078 | 10.023 |
3 | 1.0004 | 0.0984 | 5.0078 | 10.023 |
4 | 1.0004 | 0.0984 | 5.0078 | 10.021 |
4.5 | 1.0004 | 0.0972 | 5.0066 | 10.023 |
Variation (% FSR) | 0.012% | 0.036% | 0.034% | 0.04% |
Vbattery | Iset – Discharge Mode | |||
---|---|---|---|---|
0.1 A | 1 A | 5 A | 10 A | |
1 | 0.0986 | 1.0034 | 5.0226 | 10.05 |
2 | 0.0984 | 1.0032 | 5.0224 | 10.0484 |
3.1 | 0.0982 | 1.0028 | 5.0234 | 10.0448 |
3.7 | 0.098 | 1.003 | 5.0218 | 10.0458 |
4 | 0.0982 | 1.0036 | 5.023 | 10.0466 |
4.5 | 0.0982 | 1.0032 | 5.0222 | 10.0468 |
Variation (% FSR) | 0.006% | 0.008% | 0.016% | 0.052% |