The evaluation module TRF1208-AFE7950-EVM is used to evaluate the performance of TI's AFE79xx family of integrated RF sampling transceivers with TI's TRF1208 differential amplifier. The AFE79xx devices support up to 4 transmit, 4 receive, and 2 feedback channels (4T4R2F) and integrates phase-locked loop (PLL) and voltage-controlled oscillator (VCO) for generating data-converter clocks. The AFE79xx device integrates 8 JESD204B- and JESD204C-compatible serializer or deserializer (SerDes) transceivers capable of running up to 29.5 Gbps to transmit and receive digital data through the onboard FPGA mezzanine card (FMC) connector.
TRF1208 device is a fully differential amplifier that either drives the ADC of receive paths (in S2D configuration) or are driven by the DAC of the transmit path (in D2S configuration). The EVM includes the LMK04828 clock generator to provide reference clocks and SYSREF to the analog front end (AFE) and capture card (field-programmable gate array, FPGA). The evaluation module (EVM) works off a single 5.5-V input and includes complete power management circuitry. External clocking options include support for feeding the reference clock (for the on-chip PLL). The design interfaces with the TI pattern and capture card solution (TSW14J56 and TSW14J57), as well as many FPGA development kits.
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The TRF1208-AFE7950-EVM includes a clocking and power solution, and runs off a single 5.5-V supply. As Figure 1-1 shows, the RF inputs and outputs using SMA connectors are on the top side of the EVM. A reference clock (for example, 10 MHz) to lock the onboard voltage-controlled crystal oscillator (VCXO) with the LMK04828, PLL-1 can be provided to the connector named LMK CLKIN (SMA J15). (1)
SMA J13 (REF_CLK_HIGH) or SMA J14 (REF_CLK_LOW) can be used to feed an external reference clock to lock the PLLs in the AFE79xx. The USB connector and the 5.5-V connector are on the right side of the board.
Figure 1-2 shows the bottom view of the TRF1208-AFE7950-EVM.
The capture card that is used with the TRF1208-AFE7950-EVM is typically the TSW14J56 or TSW14J57. The TSW14J56 supports a SerDes speed of up to 12.5 Gbps and the TSW14J57 goes as high as 15 Gbps. The choice of the TSW14J56 or TSW14J57 EVM depends on the AFE79xx JESD204 configuration and the associated SerDes rate.
Two bench power supplies are required to power the TRF1208-AFE7950-EVM and TSW14J5x EVM. A PC to program the EVM and capture card is required. For more information, see Section 1.1.1. All lab equipment requirements (such as signal source, signal analyzer, and so forth) are left to the users' discretion.
The recommended test environment for the TRF1208-AFE7950-EVM are as follows: