SNVU663A June 2019 – May 2021 LP87524-Q1 , LP87524B-Q1 , LP87524J-Q1 , LP87524P-Q1
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The LP87524B/J/P-Q1 contains four step-down DC/DC converter cores, which are configured as 4 single phase outputs. These devices power AWR1642 and AWR1243 automotive radar devices and IWR1642 industrial radar devices.
This technical reference manual can be used as a reference for the LP87524B/J/P-Q1 default register bits after OTP memory download. This technical reference manual does not provide information about the electrical characteristics, external components, package, or the functionality of the device. For this information and the full register map, refer to the LP87524B/J/P-Q1 Four 4-MHz Buck Converters for AWR and IWR MMICs datasheet.
There are a few important connections to ensure the LP87524B/J/P-Q1 is configured correctly, each of which are described in this section. Good examples of how to connect the radar devices to the LP87524B/J/P-Q1 PMICs are shown in Figure 2-1, Figure 2-2 and Figure 2-3. LDOs are not required as the device meets noise and ripple specifications with LC filters. Refer to XWR1xxx Power Management Optimizations – Low Cost LC Filter Solution application report.
The SCL and SDA lines (pins 5 & 6, respectively) are used to communicate between the MCU and the LP87524B/J/P-Q1 PMIC using an I2C compatible Interface. The I2C compatible synchronous serial interface provides access to the programmable functions and registers on the device. This protocol uses a two-wire interface for bidirectional communications between the IC's connected to the bus. The two interface lines are the serial data line (SDA), and the serial clock line (SCL). Every device on the bus is assigned a unique address and acts as either a master or a slave depending on whether it generates or receives the serial clock SCL. The SCL and SDA lines must each have a pullup resistor placed on the line and remain HIGH even when the bus is idle. The LP87524B/J/P-Q1 supports standard mode (100 kHz), fast mode (400 kHz), fast mode plus (1 MHz), and high-speed mode (3.4 MHz). For all I2C protocol details refer to the device datasheet.