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The LM5157EVM-SEPIC supports the following features and performance capabilities:
The electrical performance of the EVM is show in Table 1-1. The EVM terminals and signal test points are listed in Table 1-2. The typical application circuit is shown in Figure 2-1. The EVM complete schematic is shown in Figure 6-1.
Parameter | Test Conditions | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
INPUT CHARACTERISTICS | |||||
Input voltage Range VIN | Normal operation, 1 A full load | 6 | 12 | 32 | V |
Power derating from 1 A down to 0.5 A | 4 | 6 | V | ||
Input voltage turn on VIN(ON) | Adjusted by the UVLO/SYNC resistors | 3.9 | V | ||
Input voltage turn off VIN(OFF) | 3.7 | V | |||
OUTPUT CHARACTERISTICS | |||||
Output Voltage VOUT | 12 | V | |||
Maximum Output Current IOUT | VIN > 6 V | 1 | A | ||
4 V < VIN < 6 V | 0.5 | 1 | A | ||
SYSTEM CHARACTERISTICS | |||||
Switching Frequency |
2.1 |
MHz | |||
Full Load Efficiency | VIN = 12 V, IOUT = 1 A | 92 | % | ||
Ambient Temperature, TA | -40 | 125 | °C |
The LM5157EVM-SEPIC is designed to support a full load of 1 A when the input voltage is higher than 6 V. When the input voltage is below 6 V, the output power needs to be derated, owing to the peak current limitation of the selected inductor on the EVM. Figure 1-1 shows the power derating curve.
Table 1-2 summarizes the EVM terminals and signal test points.
Terminal | SIGNAL | PINS | FUNCTION DESCRIPTION |
---|---|---|---|
J1 | VIN+ | Input Connector | |
J2 | VOUT+ | Output Connector | |
J3 | GND | Input Return Connector | |
J4 | PGND | PGND Signal | |
J5 | GND | Output Return Connector | |
J6 | VOUT | Pin 1 to 2 | Connect VOUT to BIAS pin of the LM5157 through D2 |
Pin 2 to 3 | Directly connect VOUT to BIAS pin of the LM5157 | ||
J7 | VIN | Pin 1 to 2 | Connect VIN to BIAS pin of the LM5157 through D3 |
Pin 2 to 3 | Directly connect VIN to BIAS pin of the LM5157 | ||
J8 | VCC | Pin 1 to 2 | Directly connect VCC to BIAS pin of the LM5157 |
J9 | VAUX | Pin 1 to 2 | Connect VAUX to BIAS |
J10 | MODE | Pin 1 to 2 | MODE pin connected to AGND. Hiccup mode protection is disabled and spread spectrum is disabled |
Pin 3 to 4 | MODE pin connected to AGND with 34.4 kOhm. Hiccup mode protection is enabled and spread spectrum is enabled | ||
Pin 5 to 6 | MODE pin connected to AGND with 62.0 kOhm. Hiccup mode protection is enabled and spread spectrum is disabled | ||
Pin 7 to 8 |
MODE pin connected to AGND with 100 kOhm. Hiccup mode protection is disabled and spread spectrum is enabled | ||
J11 | SS | Pin 1 | IC SS Pin Signal |
COMP | Pin 2 | IC COMP Pin Signal | |
AGND | Pin 3 | IC AGND Pin Signal | |
UVLO | Pin 4 | IC UVLO Pin Signal and External Enable Control | |
PGOOD | Pin 5 | IC PGOOD Pin Signal | |
BIAS-IC | Pin 6 | IC BIAS Pin Signal | |
VCC | Pin 7 | IC VCC Pin Signal | |
TP1 | VIN+ | Input Voltage Sense Point | |
TP2 | VOUT+ | Output Voltage Sense Point | |
TP3 | PGND | Input Return Sense Point | |
TP4 | PGND | Output Return Sense Point | |
TP5 | VOUT+ | Positive terminal for AC injection | |
TP6 | SW | Switch node | |
TP7 | VOUT- | Negative terminal for AC injection | |
TP8 |
VAUX |
Auxiliary winding |
|
TP9 | GND | Ground signal for AUX voltage |
Figure 2-1 shows a typical LM5157 SEPIC schematic employing a coupled inductor. Note that the same schematic is applicable to the LM51571, LM5157-Q1, and LM51571-Q1. Refer to Figure 6-1 for the complete EVM schematic.