OPA202、OPA2202、OPA4202 (OPAx202) は、TI の業界最先端の高精度スーパーベータ相補性バイポーラ半導体プロセスで製造されたデバイス・ファミリです。このプロセスを使用すると、非常に低いフリッカー・ノイズ、低いオフセット電圧、低いオフセット電圧温度ドリフト、同相と電源変動に対する非常に優れた直線性が得られます。これらのデバイスは、DC 精度、重い容量性負荷の駆動、外部 EMI、熱、短絡に対する保護において非常に優れています。
消費電流は ±18V で 580µA です。OPAx202 は位相反転を起こさず、大きな容量性負荷でも安定に動作します。OPAx202 は、-40℃~+105℃の温度範囲で完全に動作が規定されています。
型番 | パッケージ | 本体サイズ(公称) |
---|---|---|
OPA202 | SOIC (8) | 4.90mm×3.91mm |
SOT-23 (5) | 2.90mm×1.60mm | |
VSSOP (8) (プレビュー) | 3.00mm × 3.00mm | |
OPA2202 | VSSOP (8) | 3.00mm×3.00mm |
OPA4202 | SOIC (14) | 8.65mm×3.91mm |
Changes from D Revision (December 2019) to E Revision
Changes from C Revision (October 2018) to D Revision
Changes from B Revision (December 2018) to C Revision
Changes from A Revision (September 2018) to B Revision
Changes from * Revision (October 2017) to A Revision
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
D (SOIC)
DGK (VSSOP) |
DBV (SOT-23) | |||
–IN | 2 | 4 | I | Inverting input |
+IN | 3 | 3 | I | Noninverting input |
NC | 1, 5, 8 | — | — | No internal connection (can be left floating) |
OUT | 6 | 1 | O | Output |
V– | 4 | 2 | — | Negative (lowest) power supply |
V+ | 7 | 5 | — | Positive (highest) power supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input channel A |
+IN A | 3 | I | Noninverting input channel A |
–IN B | 6 | I | Inverting input channel B |
+IN B | 5 | I | Noninverting input channel B |
OUT A | 1 | O | Output channel A |
OUT B | 7 | O | Output channel B |
V– | 4 | — | Negative supply |
V+ | 8 | — | Positive supply |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
–IN A | 2 | I | Inverting input channel A |
+IN A | 3 | I | Noninverting input channel A |
–IN B | 6 | I | Inverting input channel B |
+IN B | 5 | I | Noninverting input channel B |
–IN C | 9 | I | Inverting input channel C |
+IN C | 10 | I | Noninverting input channel C |
–IN D | 13 | I | Inverting input channel D |
+IN D | 12 | I | Noninverting input channel D |
OUT A | 1 | O | Output channel A |
OUT B | 7 | O | Output channel B |
OUT C | 8 | O | Output channel C |
OUT D | 14 | O | Output channel D |
V– | 11 | — | Negative supply |
V+ | 4 | — | Positive supply |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Supply voltage,
VS = (V+) – (V–) |
Single-supply | 40 | V | ||
Dual-supply | ±20 | ||||
Signal input pins | Voltage | Common-mode(4) | (V–) – 0.5 | (V+) + 0.5 | |
Differential(3) | ±0.5 | ||||
Current | ±10 | mA | |||
Output short current(2) | Continuous | ||||
Operating temperature, TA | –40 | 125 | °C | ||
Junction temperature, TJ | 125 | ||||
Storage temperature, Tstg | –65 | 150 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2500 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 |
MIN | NOM | MAX | UNIT | |||
---|---|---|---|---|---|---|
VS | Supply voltage, [ (V+) – (V–) ] | Single-supply | 4.5 | 36 | V | |
Dual-supply | ±2.25 | ±18 | ||||
TA | Specified temperature | –40 | 105 | °C |
THERMAL METRIC(1) | OPA202 | UNIT | |||
---|---|---|---|---|---|
D (SOIC) | DGK (VSSOP) | DBV (SOT-23) | |||
8 PINS | 8 PINS | 5 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 136 | 176.7 | 206.0 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 74 | 63.9 | 121.8 | °C/W |
RθJB | Junction-to-board thermal resistance | 62 | 99.4 | 65.9 | °C/W |
ΨJT | Junction-to-top characterization parameter | 19.7 | 8.8 | 39.0 | °C/W |
ΨJB | Junction-to-board characterization parameter | 54.8 | 97.6 | 65.6 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | N/A | N/A | °C/W |
THERMAL METRIC(1) | OPA2202 | UNIT | |
---|---|---|---|
DGK (VSSOP) | |||
8 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 180.1 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 68.3 | °C/W |
RθJB | Junction-to-board thermal resistance | 101.4 | °C/W |
ΨJT | Junction-to-top characterization parameter | 10.5 | °C/W |
ΨJB | Junction-to-board characterization parameter | 99.8 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
THERMAL METRIC(1) | OPA4202 | UNIT | |
---|---|---|---|
D (SOIC) | |||
14 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 87.9 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 42.7 | °C/W |
RθJB | Junction-to-board thermal resistance | 44.6 | °C/W |
ΨJT | Junction-to-top characterization parameter | 8.9 | °C/W |
ΨJB | Junction-to-board characterization parameter | 44.1 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | N/A | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
OFFSET VOLTAGE | |||||||
VOS | Input offset voltage | VS = ±18 V | ±20 | ±200 | µV | ||
VS = ±18 V, TA = –40°C to +105°C | ±250 | ||||||
dVOS/dT | Input offset voltage drift | OPA202, OPA4202ID | TA = –40°C to +105°C | ±0.5 | ±1 | µV/°C | |
OPA2202IDGK | TA = –40°C to +105°C | ±0.5 | ±1.5 | µV/°C | |||
PSRR | Input offset voltage versus power supply | VS = ±2.25 V to ±18 V | ±0.1 | ±0.5 | µV/V | ||
VS = ±2.25 V to ±18 V, TA = –40°C to +105°C | ±0.5 | ||||||
INPUT BIAS CURRENT | |||||||
IB | Input bias current | ±0.25 | ±2 | nA | |||
TA = –40°C to +105°C | ±2.1 | ||||||
IOS | Input offset current | OPA202 | ±15 | ±150 | pA | ||
TA = –40°C to +105°C | ±700 | ||||||
OPA2202IDGK, OPA4202ID | ±25 | ±250 | |||||
TA = –40°C to +105°C | ±700 | ||||||
NOISE | |||||||
Input voltage noise | f = 0.1 Hz to 10 Hz | 0.2 | µVPP | ||||
0.03 | µVRMS | ||||||
en | Input voltage noise density | f = 10 Hz | 9.5 | nV/√Hz | |||
f = 100 Hz | 9.1 | ||||||
f = 1 kHz | 9 | ||||||
in | Input current noise | f = 1 kHz | 0.076 | pA/√Hz | |||
INPUT VOLTAGE RANGE | |||||||
VCM | Common-mode voltage range | (V–) + 1.5 | (V+) – 1.5 | V | |||
CMRR | Common-mode rejection ratio | VS = ±2.25 V | (V–) + 1.5 V < VCM < (V+) – 1.5 V | 114 | 131 | dB | |
(V–) + 1.5 V < VCM < (V+) – 1.5 V,
TA = –40°C to +105°C |
114 | ||||||
VS = ±18 V | (V–) + 1.5 V < VCM < (V+) – 1.5 V | 126 | 148 | ||||
(V–) + 1.5 V < VCM < (V+) – 1.5 V,
TA = –40°C to +105°C |
119 | ||||||
INPUT CAPACITANCE | |||||||
Differential | 10 || 3.3 | MΩ || pF | |||||
Common-mode | 3 || 0.5 | TΩ || pF | |||||
OPEN-LOOP GAIN | |||||||
AOL | Open-loop voltage gain | VS = ±2.25 V | (V–) + 1.25 V ≤ VO ≤ (V+) – 1.25 V,
RL = 10 kΩ |
120 | 135 | dB | |
(V–) + 1.25 V ≤ VO ≤ (V+) – 1.25 V,
RL = 10 kΩ, TA = –40℃ to +105℃ |
119 | ||||||
VS = ±18 V | (V–) + 1.25 V ≤ VO ≤ (V+) – 1.25 V,
RL = 10 kΩ |
126 | 150 | ||||
(V–) + 1.25 V ≤ VO ≤ (V+) – 1.25 V,
RL = 10 kΩ, TA = –40℃ to +105℃ |
126 | ||||||
VS = ±2.25 V | (V–) + 1.25 V ≤ VO ≤ (V+) – 1.25 V,
RL = 2 kΩ |
120 | 133 | ||||
(V–) + 1.25 V ≤ VO ≤ (V+) – 1.25 V,
RL = 2 kΩ, TA = –40℃ to +105℃ |
119 | ||||||
VS = ±18 V | (V–) + 1.25 V ≤ VO ≤ (V+) – 1.25 V,
RL = 2 kΩ |
126 | 150 | ||||
(V–) + 1.25 V ≤ VO ≤ (V+) – 1.25 V,
RL = 2 kΩ, TA = –40℃ to +105℃ |
126 | ||||||
FREQUENCY RESPONSE | |||||||
GBW | Gain-bandwidth product | 1 | MHz | ||||
SR | Slew rate | 10-V step, G = 1 | 0.35 | V/µs | |||
tS | Settling time | To 0.1%, 10-V step , G = 1 | 30 | µs | |||
To 0.01%, 10-V step , G = 1 | 32 | ||||||
Overload recovery time | VIN × gain > VS | 4 | µs | ||||
THD+N | Total harmonic distortion + noise | VO = 3 VRMS, G = 1, f = 1 kHz, RL = 10 kΩ | 0.0002% | ||||
OUTPUT | |||||||
Voltage output swing from rail | VS = ±18 V | TA = 25°C, No Load | 650 | 750 | mV | ||
TA = 25°C, RL = 10 kΩ | 800 | 900 | |||||
TA = 25°C, RL = 2 kΩ | 1.05 | 1.15 | V | ||||
TA = –40°C to +105°C, RL = 10 kΩ | 1 | ||||||
AOL > 120 dB, RL = 10 kΩ | 1.05 | ||||||
AOL > 120 dB, RL = 2 kΩ | 1.25 | ||||||
ISC | Short-circuit current | Sinking | 35 | mA | |||
Sourcing | 35 | ||||||
CLOAD | Capacitive load drive | Figure 28 | |||||
ZO | Open-loop output impedance | IO = 0 mA, f = 1 MHz; see Figure 27 | 50 | Ω | |||
POWER SUPPLY | |||||||
IQ | Quiescent current per amplifier | IO = 0 mA | 580 | 800 | µA | ||
IO = 0 mA, TA = –40°C to +105°C | 900 |
DESCRIPTION | FIGURE |
---|---|
Offset Voltage Production Distribution | Figure 1 |
Offset Voltage Drift Distribution From –40°C to +105°C | Figure 2 |
Input Bias Current Production Distribution | Figure 3 |
Input Offset Current Production Distribution | Figure 4 |
Offset Voltage vs Temperature | Figure 5 |
Offset Voltage vs Common-Mode Voltage | Figure 6 |
Offset Voltage vs Supply Voltage | Figure 7 |
Open-Loop Gain and Phase vs Frequency | Figure 8 |
Closed-Loop Gain vs Frequency | Figure 9 |
Input Bias Current vs Common-Mode Voltage | Figure 10 |
Input Bias Current and Offset vs Temperature | Figure 11 |
Output Voltage Swing vs Output Current | Figure 12 |
Output Voltage Swing vs Output Current (Sourcing) | Figure 13 |
Output Voltage Swing vs Output Current (Sinking) | Figure 14 |
CMRR and PSRR vs Frequency | Figure 15 |
CMRR vs Temperature | Figure 16 |
PSRR vs Temperature | Figure 17 |
0.1-Hz to 10-Hz Voltage Noise | Figure 18 |
Input Voltage Noise Spectral Density vs Frequency | Figure 19 |
THD+N Ratio vs Frequency | Figure 20 |
THD+N vs Output Amplitude | Figure 21 |
Quiescent Current vs Supply Voltage | Figure 22 |
Quiescent Current vs Temperature | Figure 23 |
Open-Loop Gain vs Temperature (10-kΩ) | Figure 24 |
Open-Loop Gain vs Output Voltage Swing to Supply | Figure 25, Figure 26 |
Open-Loop Output Impedance vs Frequency | Figure 27 |
Small-Signal Overshoot vs Capacitive Load (10-mV Step) | Figure 28 |
No Phase Reversal | Figure 29 |
Positive Overload Recovery | Figure 30 |
Negative Overload Recovery | Figure 31 |
Small-Signal Step Response (10-mV Step) | Figure 32, Figure 33 |
Large-Signal Step Response (10-V Step) | Figure 34, Figure 35 |
Settling Time (10-V Step) | Figure 36 |
Short-Circuit Current vs Temperature | Figure 37 |
Maximum Output Voltage vs Frequency | Figure 38 |
EMIRR vs Frequency | Figure 39 |
µ = –3.56 µV | σ = 32.09 µV | N = 252 |
µ–IN = 112.335 pA | σ–IN = 154.946 pA | N = 90 |
µ+IN = 112.448 pA | σ+IN = 152.739 pA |
5 typical units |
5 typical units |
f = 1 kHz | BW = 90 kHz |
VS = ±18 V |
Unity-gain bandwidth = 1 MHz |
G = –1 |
G = +1 | 10-V step |
PRF = –10 dBm |
µ = –18.23 nV/°C | σ = 177.41 nV/°C | N = 252 |
TA = –40°C to +105°C |
µ = 0.112 pA | σ = 15.023 pA | N = 90 |
5 typical units |
VOUT = 3.5 VRMS | BW = 90 kHz | |
VS = ±2.25 V |
10-mV step |
G = +1 |
G = –1 | 10-V step |
10-V step |
The OPA202, OPA2202, and OPA4202 (OPAx202) family of devices is a series of low-power, super-beta, bipolar junction transistor (super-β BJT), input amplifiers that features superior drift performance and low input bias current. The low output impedance and heavy capacitive load drive abilities allow designers to interface to modern, fast-acquisition, precision analog-to-digital converters (ADCs) and buffer precision voltage references and drive power supply decoupling capacitors. The OPAx202 achieve a 1-MHz gain-bandwidth product and a 0.35-V/μs slew rate, and consumes only 580 µA (typical) of quiescent current, making the devices a great choice for low-power applications. These devices operate on a single 4.5-V to 36-V supply, or dual ±2.25-V to ±18-V supplies.
All versions are fully specified from –40°C to +105°C for use in the most challenging environments. The single-channel OPA202 is available in 8-pin SOIC, 8-pin VSSOP, and 5-pin SOT-23 packages. The dual-channel OPA2202 is available in an 8-pin VSSOP package. The quad-channel OPA4202 is available in a 14-pin SOIC package.
The Functional Block Diagram shows the simplified diagram of the OPAx202.