SDLS025D December   1983  – May 2017 SN5400 , SN54LS00 , SN54S00 , SN7400 , SN74LS00 , SN74S00

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings: SN74LS00
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: SNx400
    6. 6.6  Electrical Characteristics: SNx4LS00
    7. 6.7  Electrical Characteristics: SNx4S00
    8. 6.8  Switching Characteristics: SNx400
    9. 6.9  Switching Characteristics: SNx4LS00
    10. 6.10 Switching Characteristics: SNx4S00
    11. 6.11 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 Propagation Delays, Setup and Hold Times, and Pulse Width
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ(パッケージ|ピン)
  • D|14
  • N|14
サーマルパッド・メカニカル・データ
発注情報

Features

  • Package Options Include:
    • Plastic Small-Outline (D, NS, PS)
    • Shrink Small-Outline (DB)
    • Ceramic Flat (W)
    • Ceramic Chip Carriers (FK)
    • Standard Plastic (N)
    • Ceramic (J)
  • Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package
  • Inputs Are TTL Compliant; VIH = 2 V and
    VIL = 0.8 V
  • Inputs Can Accept 3.3-V or 2.5-V Logic Inputs
  • SN5400, SN54LS00, and SN54S00 are Characterized For Operation Over the Full Military Temperature Range of –55ºC to 125ºC

Applications

  • AV Receivers
  • Portable Audio Docks
  • Blu-Ray Players
  • Home Theater
  • MP3 Players or Recorders
  • Personal Digital Assistants (PDAs)

Description

The SNx4xx00 devices contain four independent,
2-input NAND gates. The devices perform the Boolean function Y = A .B or Y = A + B in positive logic.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74LS00DB SSOP (14) 6.20 mm × 5.30 mm
SN7400D, SN74LS00D, SN74S00D SOIC (14) 8.65 mm × 3.91 mm
SN74LS00NSR PDIP (14) 19.30 × 6.35 mm
SNJ5400J, SNJ54LS00J, SNJ54S00J CDIP (14) 19.56 mm × 6.67 mm
SNJ5400W, SNJ54LS00W, SNJ54S00W CFP (14) 9.21 mm × 5.97 mm
SN54LS00FK, SN54S00FK LCCC (20) 8.89 mm × 8.89 mm
SN7400NS, SN74LS00NS, SN74S00NS SO (14) 10.30 mm × 5.30 mm
SN7400PS, SN74LS00PS SO (8) 6.20 mm × 5.30 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram, Each Gate (Positive Logic)

SN5400 SN54LS00 SN54S00 SN7400 SN74LS00 SN74S00 ld_cas279.gif