SLLSEH9B October   2013  – July 2016 TPD1S414

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (EN, ACK Pins)
    6. 6.6  Electrical Characteristics (OVP Circuit)
    7. 6.7  Timing Requirements
    8. 6.8  Switching Characteristics (nFET)
    9. 6.9  Supply Current Consumption
    10. 6.10 Thermal Shutdown Feature
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Overvoltage Protection on VBUS_CON up to 30-V DC
      2. 7.3.2 Low RON nFET Switch Supports Host and Charging Mode
      3. 7.3.3 ±15-kV IEC 61000-4-2 Level 4 ESD Protection
      4. 7.3.4 100-V IEC 61000-4-5 µs Surge Protection
      5. 7.3.5 Start-Up and OVP Recovery Delay
      6. 7.3.6 Integrated Input Enable and Status Output Signal
      7. 7.3.7 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 VBUS_CON < VUVLO
      2. 7.4.2 VUVLO < VBUS_CON < VOVP
      3. 7.4.3 VBUS_CON > VOVP
      4. 7.4.4 OVP Operation
      5. 7.4.5 Host/OTG Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 USB VBUS Voltage Range
        2. 8.2.2.2 USB VBUS Operating Current
        3. 8.2.2.3 VBUS_CON and VBUS_SYS Capacitance
        4. 8.2.2.4 IEC 61000-4-5 100-V Open-Circuit Surge
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resource
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • YZ|12
サーマルパッド・メカニカル・データ
発注情報

1 Features

  • Overvoltage Protection at VBUS_CON Up to 30-V DC
  • Low RON nFET Switch Supports Host and Charging Mode
  • Internal 15-ms Start-Up Delay
  • Internal 30-ms Soft-Start Delay to Minimize the USB Inrush Current
  • Transient Protection for VBUS Line:
    • IEC 61000-4-2 Contact Discharge ±15 kV
    • IEC 61000-4-2 Air Gap Discharge ±15 kV
    • IEC 61000-4-5 Open-Circuit Voltage 100 V
  • Integrated Input Enable and Status Output Signal
  • Thermal Shutdown (TSD) Feature
  • Space-Saving DSBGA Package: (1.4 mm × 1.89 mm)

2 Applications

  • End Equipment
    • Mobile Phones
    • Tablets
    • Wearables
    • Electronic-Point-of-Sale (EPOS)
  • Interfaces
    • USB 2.0
    • USB 3.0
    • USB Type C

3 Description

The TPD1S414 device is a single-chip solution for a USB connector’s VBUS line protection. The bidirectional nFET switch ensures safe current flow in both charging and host mode while protecting the internal system circuits from any overvoltage conditions at the VBUS_CON pin. On the VBUS_CON pin, this device can handle overvoltage protection up to 30 V. After the EN pin toggles low, the TPD1S414 waits 20 ms before turning ON the nFET through a soft-start delay. ACK pin indicates the FET is completely turned ON.

The typical application interface for the TPD1S414 is the VBUS line in USB connectors. Typical end equipment for TPD1S414 are mobiles phones, tablets, wearables, and electronic-point-of-sale (EPOS). The TPD1S414 can also be applied to any system using an interface with a 5-V power rail.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPD1S414 DSBGA (12) 1.40 mm × 1.89 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Schematic

TPD1S414 TPD1S414_App_Diagram_2.gif