SBAA275A June   2018  – March 2023 ADS1120 , ADS112C04 , ADS112U04 , ADS1147 , ADS1148 , ADS114S06 , ADS114S06B , ADS114S08 , ADS114S08B , ADS1220 , ADS122C04 , ADS122U04 , ADS1247 , ADS1248 , ADS124S06 , ADS124S08 , ADS125H02 , ADS1260 , ADS1261 , ADS1262 , ADS1263

 

  1.   A Basic Guide to RTD Measurements
  2. 1RTD Overview
    1. 1.1 Callendar-Van Dusen Equation
    2. 1.2 RTD Tolerance Standards
    3. 1.3 RTD Wiring Configurations
    4. 1.4 Ratiometric Measurements
      1. 1.4.1 Lead Resistance Cancellation
      2. 1.4.2 IDAC Current Chopping
    5. 1.5 Design Considerations
      1. 1.5.1 Identify the RTD Range of Operation
      2. 1.5.2 Set the Excitation Current Sources and Consider RTD Self Heating
      3. 1.5.3 Set Reference Voltage and PGA Gain
      4. 1.5.4 Verify the Design Fits the Device Range of Operation
      5. 1.5.5 Design Iteration
  3. 2RTD Measurement Circuits
    1. 2.1  Two-Wire RTD Measurement With Low-Side Reference
      1. 2.1.1 Schematic
      2. 2.1.2 Pros and Cons
      3. 2.1.3 Design Notes
      4. 2.1.4 Measurement Conversion
      5. 2.1.5 Generic Register Settings
    2. 2.2  Two-Wire RTD Measurement With High-Side Reference
      1. 2.2.1 Schematic
      2. 2.2.2 Pros and Cons
      3. 2.2.3 Design Notes
      4. 2.2.4 Measurement Conversion
      5. 2.2.5 Generic Register Settings
    3. 2.3  Three-Wire RTD Measurement, Low-Side Reference
      1. 2.3.1 Schematic
      2. 2.3.2 Pros and Cons
      3. 2.3.3 Design Notes
      4. 2.3.4 Measurement Conversion
      5. 2.3.5 Generic Register Settings
      6. 2.3.6 Chopping IDAC Currents for Matching
    4. 2.4  Three-Wire RTD Measurement, Low-Side Reference, One IDAC Current Source
      1. 2.4.1 Schematic
      2. 2.4.2 Pros and Cons
      3. 2.4.3 Design Notes
      4. 2.4.4 Measurement Conversion
      5. 2.4.5 Configuration Register Settings
    5. 2.5  Three-Wire RTD Measurement, High-Side Reference
      1. 2.5.1 Schematic
      2. 2.5.2 Pros and Cons
      3. 2.5.3 Design Notes
      4. 2.5.4 Measurement Conversion
      5. 2.5.5 Configuration Register Settings
    6. 2.6  Four-Wire RTD Measurement, Low-Side Reference
      1. 2.6.1 Schematic
      2. 2.6.2 Pros and Cons
      3. 2.6.3 Design Notes
      4. 2.6.4 Measurement Conversion
      5. 2.6.5 Configuration Register Settings
    7. 2.7  Two Series Two-Wire RTD Measurements, Low-Side Reference
      1. 2.7.1 Schematic
      2. 2.7.2 Pros and Cons
      3. 2.7.3 Design Notes
      4. 2.7.4 Measurement Conversion
      5. 2.7.5 Configuration Register Settings
    8. 2.8  Two Series Four-Wire RTD Measurements
      1. 2.8.1 Schematic
      2. 2.8.2 Pros and Cons
      3. 2.8.3 Design Notes
      4. 2.8.4 Measurement Conversion
      5. 2.8.5 Configuration Measurement Settings
    9. 2.9  Multiple Two-Wire RTD Measurements
      1. 2.9.1 Schematic
      2. 2.9.2 Pros and Cons
      3. 2.9.3 Design Notes
      4. 2.9.4 Measurement Conversion
      5. 2.9.5 Configuration Register Settings
    10. 2.10 Multiple Three-Wire RTD Measurements
      1. 2.10.1 Schematic
      2. 2.10.2 Pros and Cons
      3. 2.10.3 Design Notes
      4. 2.10.4 Measurement Conversion
      5. 2.10.5 Configuration Register Settings
    11. 2.11 Multiple Four-Wire RTD Measurements in Parallel
      1. 2.11.1 Schematic
      2. 2.11.2 Pros and Cons
      3. 2.11.3 Design Notes
      4. 2.11.4 Measurement Conversion
      5. 2.11.5 Configuration Register Settings
    12. 2.12 Universal RTD Measurement Interface With Low-Side Reference
      1. 2.12.1 Schematic
      2. 2.12.2 Pros and Cons
      3. 2.12.3 Design Notes
        1. 2.12.3.1 Universal Measurement Interface - Two-Wire RTD
        2. 2.12.3.2 Universal Measurement Interface - Three-Wire RTD
        3. 2.12.3.3 Universal Measurement Interface - Four-Wire RTD
      4. 2.12.4 Measurement Conversion
        1. 2.12.4.1 Two-Wire Measurement
        2. 2.12.4.2 Three-Wire Measurement
        3. 2.12.4.3 Four-Wire Measurement
      5. 2.12.5 Configuration Register Settings
    13. 2.13 Universal RTD Measurement Interface With High-Side Reference
      1. 2.13.1 Schematic
      2. 2.13.2 Pros and Cons
      3. 2.13.3 Design Notes
        1. 2.13.3.1 Universal Measurement Interface, High-Side Reference - Two-Wire RTD
        2. 2.13.3.2 Universal Measurement Interface, High-Side Reference - Three-Wire RTD
        3. 2.13.3.3 Universal Measurement Interface, High-Side Reference - Four-Wire RTD
      4. 2.13.4 Measurement Conversion
        1. 2.13.4.1 Two-Wire Measurement
        2. 2.13.4.2 Three-Wire Measurement
        3. 2.13.4.3 Four-Wire Measurement
      5. 2.13.5 Configuration Register Settings
  4. 3Summary
  5. 4Revision History

2.5.3 Design Notes

Similar to the three-wire RTD measurement with a low side reference, measurement with a high side reference uses lead wire compensation to remove the lead resistance as an error in the measurement. However, using the high side reference, the same current is used to drive the reference resistor and the RTD. The lead wire compensation using the second IDAC current does not introduce a gain error term with mismatched IDACs. Using the high side reference makes this measurement less reliant on IDAC current mismatch so that chopping is not required.

The measurement circuit requires:

  • Single dedicated IDAC output pin
  • AINP and AINN inputs
  • External reference input
  • Precision reference resistor

IDAC1 sources current to RREF which then flows into to lead 1 of the three-wire RTD. Similar to the low side current measurement, IDAC2 sources current to lead 2 of the RTD to cancel the error from lead wire resistance. IDAC1 and IDAC2 sum into RBIAS, which is required to establish the DC offset of the input signal. This DC offset sets the RTD voltage near mid-supply so the input is within the input range of the PGA.

As with the previous topologies, this measurement is ratiometric, and does not require converting the input or reference to voltage for the conversion. Also as in the previous RTD measurements, the topology requires a precision reference resistor with high accuracy and low drift.

Calculating the input voltages at AIN1 and AIN2, the result is:

Equation 55. VAIN1 = [IIDAC1 • (RRTD + RLEAD1)] + [(IIDAC1 + IIDAC2) • (RLEAD3 + RBIAS)]
Equation 56. VAIN2 = (IIDAC2 • RLEAD2) + [(IIDAC1 + IIDAC2) • (RLEAD3 + RBIAS)]

The ADC input voltage measures VAIN1 – VAIN2, with RLEAD3 and RBIAS terms dropping out.

Equation 57. VAIN1 – VAIN2 = [IIDAC1 • (RRTD + RLEAD1)] – (IIDAC2 • RLEAD2)

Assuming lead resistances are equal and IDAC currents are matched, with IIDAC1 = IIDAC2 = IIDAC. The result becomes:

Equation 58. VAIN1 – VAIN2 = IIDAC1 • RRTD

At the same time, the reference resistor is driven from only IDAC1:

Equation 59. VREF = IIDAC1 • RREF

As with the previous examples, start the design with the expected usable range of the RTD. The reference resistor and IDAC current values are chosen to place the input voltage within the PGA range, while ensuring that the IDAC is operating within its compliance voltage. As in all ratiometric measurements, the reference resistor, RREF must be a precision resistor with high accuracy and low drift.

To verify that the design is within the PGA range of operation, start by calculating the voltages of AIN1 and AIN2 and the maximum differential input voltage. Assuming the lead resistances are small and can be ignored, Equation 55 and Equation 56 reduce to Equation 60 and Equation 61. Verify that VAIN1 and VAIN2 are within the input range of the PGA given the gain setting and supply voltage. Use the maximum RTD resistance based on the desired temperature measurement.

Equation 60. VAIN1 = (IIDAC1 • RRTD) + [(IIDAC1 + IIDAC2) • RBIAS]
Equation 61. VAIN2 = (IIDAC1 + IIDAC2) • (RBIAS)

Additionally, verify the output voltage of the IDAC sources calculated from VAIN0 and VAIN3 are low enough from AVDD to be within the compliance voltage of the IDAC current source. Because the voltage for IDAC1 always be higher than that of IDAC2, it is sufficient to calculate the output voltage at VAIN0 to verify the IDAC compliance voltage. The output voltage of the IDAC at AIN0 can be calculated from Equation 62.

Equation 62. VAIN0 = [IIDAC1 • (RREF + RRTD)] + [(IIDAC1 + IIDAC2) • RBIAS]

The reference resistor, RREF must be a precision resistor with high accuracy and low drift. Any error in the RREF reflects the same error in the RTD measurement. The REFP0 and REFN0 pins are shown connecting to the RREF resistor as a Kelvin connection to get the best measurement of the reference voltage. This eliminates any series resistance as an error from the reference resistance measurement.