Design Description

This circuit performs a ±12-V isolated voltage sensing measurement utilizing the ISO224 isolated amplifier and the ADS745 SAR ADC. The ISO224 can measure true differential signals of ±12V with a fixed gain of ⅓V/V and produces an isolated differential output voltage with an output common-mode voltage of VDD2 / 2. The ADS7945 is a fully differential input ADC with a full-scale input voltage of ±V_REF and a common-mode input voltage of V_REF / 2 ±200mV. Selecting a +5-V reference allows the ADS7945 to accept the full-scale and common-mode outputs from the ISO224. Capturing the ISO224 output with a fully differential input ADC doubles the system dynamic range compared to a single-ended conversion. Many high-voltage industrial applications such as Protection Relays, Channel-to-Channel Isolated ±10V Analog Input Cards, and Inverter & Motor Control. The equations and explanation of component selection in this design can be customized based on system specifications and needs.

Specifications

Design Notes

1. The ADS7945 was selected due to its low power and a compatible analog input structure with the ISO224.
2. Verify the systems linear operation for the desired input signal range. This is verified using simulation in the DC Transfer Characteristics selection.
3. Select COG capacitors for C_FILT to minimize distortion.
4. Understanding and Calibrating the Offset and Gain for ADC Systems covers methods for error analysis. Review the link for methods to minimize gain, offset, drift, and noise errors.
5. The TI Precision Labs - ADCs training video series covers methods for selecting the charge bucket circuit R_FILT and C_FILT. These component values are dependent on the amplifier bandwidth, data converter sampling rate, and data converter design. The values shown here will give good settling and AC performance for the amplifier and data converter in this example. If the design is modified, a different RC filter must be selected. Refer to Introduction to SAR ADC Front-End Component Selection for an explanation of how to select the RC filter for best settling and AC performance.

Component Selection

1. Select an isolated amplifier based on the input voltage range and determine the output common-mode voltage and output voltage range:

   ISO224:

   • ±12-V single-ended input range
   • Fixed gain of ⅓, yielding ±4-V differential output
   • Output common-mode voltage of +2.5V
   • 4.5-V to 18-V high-side power supply, 4.5-V to 5.5-V low-side power supply
   • Input Offset: ±5mV at 25°C, ±42µV/°C maximum
   • Gain Error: ±0.3% at 25°C, ±50ppm/°C maximum
   • Nonlinearity: ±0.01% max, ±1ppm/°C
   • High-input impedance of 1.25MΩ

2. Select an ADC with an appropriate common-mode and differential input range to pair with the +2.5-V common-mode and ±4-V differential output of the ISO224:

   ADS7945:

   • ±5-V maximum analog input range
   • Full-scale input span set by ±voltage reference
   • Input common-mode range of V_REF / 2 ±0.2V
   • 2.7-V to 5.25-V power supply
   • High SNR of 84, low power of 11.6mW at 2Msps

3. Select a voltage reference that supports the common-mode constraint set by the 2.5-V common-mode output of the ISO224 and the V_REF / 2 ±0.2-V common-mode input voltage of the ADS7945. This means that the reference output voltage must be 5V, low noise, and a configurable input voltage is preferred:

   REF5050:

   • 5-V output
   • 5.2-V to 18-V input voltage power supply
   • 3μVPP/V noise

4. Select R_1FILT, R_2FILT, and C_FILT for settling of the input signal and sample rate of 100ksps:

   Refine the R_FILT and C_FILT Values is a TI Precision Labs video showing the methodology for selecting R_FILT and C_FILT. The final value of 120Ω and 510pF proved to settle to well below ½ of a least significant bit (LSB) within the acquisition window.

DC Transfer Characteristics

The following graph shows the simulated output for a ±15-V input. The desired linear range is a ±4-V output for a ±12-V input. This simulation shows that the linear output range is approximately ±4.6V which is well beyond the requirement.

The transfer function shows the ISO224 gain is ⅓ (that is, Gain · V_IN = V_OUT, (⅓)·(12V) = 4V).

AC Transfer Characteristics

The simulated bandwidth is approximately 186kHz and the gain is –9.57dB (or 0.332V/V) which closely matches the expected gain and bandwidth for the ISO224 (specified fc = 175kHz, gain = 0.333V/V).

Transient ADC Input Settling Simulation

The following simulation shows the transient settling results with an acquisition time of 9.6μs. The 11-μV settling error is well within the 0.5 × LSB limit of 305μV. See Refine the Rfilt and Cfilt Values for detailed theory on this subject.

Noise Simulation

The following noise calculation looks only at the noise of the ISO224. The ISO224 noise is substantially higher than other noise sources in the circuit, so the total noise can be approximated as the ISO224 noise. The same method can be used for the B grade.

The simulated noise is greater than the expected calculated noise. This difference is due to noise peaking in the simulation model. The noise peaking is not included in the calculation. Refer to Calculating the Total Noise for ADC Systems for detailed theory on this subject.

Design Featured Devices

Design References

See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.

Link to Key Files

See the TINA files for Isolated Design.