SBAA483 February   2021 ADS1120 , ADS112C04 , ADS112U04 , ADS114S06 , ADS114S06B , ADS114S08 , ADS114S08B , ADS1220 , ADS122C04 , ADS122U04 , ADS124S06 , ADS124S08 , ADS125H02 , ADS1260 , ADS1261 , ADS1262 , ADS1263

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Features Used to Detect Wire Breaks in RTD Systems
    1. 2.1 Detecting a Wire Break Using a Continuous VREF Monitor
    2. 2.2 Detecting a Wire Break Using a Periodic VREF Monitor
    3. 2.3 Detecting a Wire Break Using Separate Analog Inputs
  5. 3Wire-Break Detection Methods for Different RTD Configurations
    1. 3.1 Wire-Break Detection Using 2-Wire RTDs
    2. 3.2 Wire-Break Detection Using 3-Wire RTDs
      1. 3.2.1 Wire-Break Detection in a One-IDAC, 3-Wire RTD System
        1. 3.2.1.1 Detecting a Break in Lead 2 in a One-IDAC, 3-Wire RTD System
          1. 3.2.1.1.1 Detecting a Break in Lead 2 in a One-IDAC, 3-Wire RTD System Using a High-Side RREF
        2. 3.2.1.2 Wire-Break Detection Summary for a One-IDAC, 3-Wire RTD System
      2. 3.2.2 Wire-Break Detection in a Two-IDAC, 3-Wire RTD System
        1. 3.2.2.1 Detecting Lead 1 or 2 breaks in a two IDAC, 3-wire RTD system using a low-side RREF
        2. 3.2.2.2 Detecting Lead 1 or 2 Breaks in a Two-IDAC, 3-Wire RTD System Using a High-Side RREF
        3. 3.2.2.3 Wire-Break Detection Summary for a Two-IDAC, 3-Wire RTD System
    3. 3.3 Wire-Break Detection in a 4-Wire RTD System
      1. 3.3.1 Detecting Lead 2 and Lead 3 Breaks in a 4-Wire RTD System Using a Low-Side RREF
      2. 3.3.2 Detecting Lead 2 and Lead 3 Breaks in a 4-Wire RTD System Using a High-Side RREF
      3. 3.3.3 Wire-Break Detection Summary for a 4-Wire RTD System
  6. 4Settling Time Considerations for RTD Wire-Break Detection
  7. 5Summary
  8.   A How Integrated PGA Rail Detection Helps Identify Wire Breaks
  9.   B Pseudo-Code for RTD Wire-Break Detection
    1.     B.1 Pseudo-Code for a 2-Wire RTD System (Low-Side or High-Side RREF)
    2.     B.2 Pseudo-Code for a One-IDAC, 3-Wire RTD System (Low-Side or High-Side RREF)
    3.     B.3 Pseudo-Code for a Two-IDAC, 3-Wire RTD System (Low-Side or High-Side RREF)
    4.     B.4 Pseudo-Code for a 4-Wire RTD System (Low-Side or High-Side RREF)
3.2.1.1.1 Detecting a Break in Lead 2 in a One-IDAC, 3-Wire RTD System Using a High-Side RREF

The high-side RREF case requires a diagnostic measurement with several configuration changes:

  • Switch IDAC1 to output on lead 2 (AINN)
  • Enable IDAC2 to output on lead 3 (AINCOM)
  • Select the ADC internal VREF as the reference voltage source
  • Select AINN and AINCOM as the measurement inputs (if necessary)
  • Reduce the PGA gain (if necessary)
  • Reduce the IDAC current magnitude (if necessary)

A different voltage reference source is required in order to check the measurement result for a fault because current cannot be forced through RREF in this case. This action is dissimilar from all other diagnostic measurement routines, and care must be taken to ensure that the external VREF inputs are reselected when the diagnostic cycle completes.

Also, the last three steps are considered if necessary because the system may already be configured as such before the diagnostic measurement begins. For example, a one-IDAC, 3-wire RTD system always requires two measurements for lead resistance cancellation: first, between AINP and AINN and second, between AINN and AINCOM. Therefore, this diagnostic routine can be implemented after the second measurement when AINN and AINCOM are already selected, eliminating some communication and switching time. Moreover, the system may be measuring a large RTD (for example, a Pt1000), where the PGA gain is already set to 1 V/V and the IDAC current magnitude is small. These latter two steps are important for fault detection and are described in more detail later in this section.

Figure 3-5 shows how to implement the diagnostic measurement for a one-IDAC, 3-wire RTD system using a high-side RREF.

GUID-20210107-CA0I-FXKV-TDF8-Q4PTRTCBJFDR-low.gifFigure 3-5 Diagnostic Measurement Checks if Lead 2 is Broken Using a High-Side RREF

If lead 2 is not broken during this diagnostic measurement, expect the following voltages (given by Equation 1 and Equation 2) at the AINx pins:

Equation 1. VAINN = IDAC1 · (RFILTER + RLEAD2 + RLEAD3 + RBIAS) + IDAC2 · RBIAS
Equation 2. VAINCOM = IDAC1 · RBIAS + IDAC2 · (RFILTER + RBIAS)

The resulting differential voltage, VIN (no wire break), between AINN and AINCOM is given by Equation 3, assuming RLEAD2 = RLEAD3, IDAC1 = IDAC2, and the RFILTER resistors are well-matched:

Equation 3. VIN (no wire break) = VAINN – VAINCOM = IDAC1 · (2 · RLEADx)

If there is no fault to alter the circuit operation, VIN (no wire break) is a very small voltage because RLEADx is typically less than 10 Ω in most cases.

Comparatively, a break in lead 2 eliminates the IDAC1 path to ground, causing IDAC1 to try to force current into the high-impedance analog input, AINN. The high impedance acts as an open circuit, raising the voltage level on AINN as the IDAC circuitry tries to maintain constant current. Eventually, this voltage is driven to the positive supply (AVDD) such that AINN is now approximately at AVDD as well.

Moreover, the voltage at AINCOM has actually reduced, because IDAC1 is no longer able to flow through RLEAD3 and RBIAS, resulting in an absolute voltage at AINCOM as given by Equation 4:

Equation 4. VAINCOM (wire break) = IDAC2 · (RFILTER + RBIAS)

The resulting differential voltage, VIN (wire break), between AINN and AINCOM is given by Equation 5:

Equation 5. VIN (wire break) = VAINN – VAINCOM = AVDD – IDAC2 · (RFILTER + RBIAS)

Assuming that a small IDAC2 magnitude is chosen as per the configuration changes discussed at the beginning of this section, VIN(wire break) is significantly larger than VIN(no wire break) and therefore easy to detect. In order to quantify what is meant by a small IDAC2 magnitude, consider the AVDD voltage as well as the size of RFILTER and RBIAS in the system, which are typically on the order of 1 kΩ to 5 kΩ each. For example, if AVDD = 5 V, RFILTER = 5 kΩ, and RBIAS = 2 kΩ, selecting an IDAC magnitude of 100 µA is a good starting point. Assuming that RLEADx = 10 Ω, these values can be entered into Equation 6 and Equation 7 to determine if the results clearly indicate when a fault has occurred:

Equation 6. VIN (no wire break) = IDAC1 · (2 · RLEADx) = 100 µA · 2 · 10 Ω = 0.002 V
Equation 7. VIN (wire break) = AVDD – IDAC2 · (RFILTER + RBIAS) = 5 V – 100 µA · (5 kΩ + 2 kΩ) = 4.3 V

For this example, set the PGA gain to 1 V/V in order to measure VIN (wire break) without saturating the amplifier. The specific gain required for the system ultimately depends on the different resistance values, AVDD, and the IDAC current magnitude chosen, so take care to select these values appropriately.