SBAA586 October   2023 AMC23C11 , UCC23513

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2System Challenge on Isolated Gate Drivers With Integrated DESAT
  6. 3System Approach With UCC23513 and AMC23C11
    1. 3.1 System Overview and Key Specification
    2. 3.2 Schematic Design
      1. 3.2.1 Circuit Schematic
      2. 3.2.2 Configure VCE(DESAT) Threshold and DESAT Bias Current
      3. 3.2.3 DESAT Blanking Time
      4. 3.2.4 DESAT Deglitch Filter
    3. 3.3 Reference PCB Layout
  7. 4Simulation and Test Results
    1. 4.1 Simulation Circuit and Results
      1. 4.1.1 Simulation Circuit
      2. 4.1.2 Simulation Results
    2. 4.2 Test Results With 3-Phase IGBT Inverter
      1. 4.2.1 Brake IGBT Test
      2. 4.2.2 Test Results on a 3-Phase Inverter With Phase to Phase Short
  8. 5Summary
  9. 6References
  10. 7Revision History

Test Results on a 3-Phase Inverter With Phase to Phase Short

Tests on a 3-phase inverter platform of a TI reference design, the TIDA-010025, have been performed to check a phase to phase short circuit condition when driving an ACIM motor. In these tests, the U phase high side IGBT's gate driver was replaced by a sample board of the proposed circuit:

GUID-20230821-SS0I-XLQ3-3CNZ-N1PGV8MHN5WM-low.svg Figure 4-5 Platform for Run Motor Test

The TIDA-010025 reference design has a 1200-V, 25-A PIM power module on the power board, which has integrated six pieces of IGBT with the same ratings in the 3-phase inverter stage. To prepare for the tests, we first removed the original gate driving resistor for the U phase high-side IGBT, then connected the VGATE output, the 15-V power supply, and the VCE sense terminal of the sample board to the power board. To avoid the influence of the reference design's own hardware OCP function, we added a 5 mΩ shunt resistor in parallel to the original 10 mΩ one in all three phases, so that we can triple the OCP trigger level to 72 A. After checked on the output characteristics of the IGBTs, we also made some changes on our sample board for the DESAT threshold to be reached when the VCE(SAT) goes up to 2.5 V, which is corresponding to about 45 A collector current. During these tests, we first run the motor (with no load) to 50 rps, then short the inverter’s U and W phases with a circuit breaker connected to the terminals of the power board. Figure 4-6 is a test result waveform.

GUID-20230822-SS0I-WWRD-2VM8-V6TBN5X55R3B-low.svg Figure 4-6 Short-Circuit Protection Delays in Run Motor Test

Once the circuit breaker was turned on, the U and W phases got shorted, and the U-phase current began to rise up rapidly. The saturate current soon reached a peak of about 95 A, then dropped a little and got stable at around 86 A. After a blinking time of 980 ns, the AMC23C11 detected the DESAT condition. After another internal propogation delay of 240 ns typically, the output OUT shifted to low. It took about 380 ns for the nDESAT to drop to the NAND gate input's negative going threshold and cut off the UCC23513's input current. The gate driver then took about 120 ns to make the IGBT's current began to drop off. The DESAT reaction time was about 1.58 μs in total.

There are some differences to the results in the low-side driving test. The differences in the two tested IGBTs' characteristics and the application circuits along with the DESAT threshold adjustment have contributed to these variations.