SBAS654G June   2014  – January 2020 AMC1305L25 , AMC1305M05 , AMC1305M25

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics: AMC1305M05
    10. 7.10 Electrical Characteristics: AMC1305x25
    11. 7.11 Switching Characteristics
    12. 7.12 Insulation Characteristics Curves
    13. 7.13 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
      2. 8.3.2 Modulator
      3. 8.3.3 Digital Output
    4. 8.4 Device Functional Modes
      1. 8.4.1 Fail-Safe Output
      2. 8.4.2 Output Behavior in Case of Full-Scale Input
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Digital Filter Usage
    2. 9.2 Typical Applications
      1. 9.2.1 Frequency Inverter Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Isolated Voltage Sensing
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Examples
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Support Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7.11 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
tCLK CLKIN, CLKIN_N clock period 49.75 50 200 ns
tHIGH CLKIN, CLKIN_N clock high time 19.9 25 120 ns
tLOW CLKIN, CLKIN_N clock low time 19.9 25 120 ns
tD Falling edge of CLKIN, CLKIN_N to DOUT, DOUT_N valid delay,
CLOAD = 5 pF		 0 15 ns
tISTART Interface startup time
(DVDD at 3.0 V min to DOUT, DOUT_N valid with AVDD ≥ 4.5 V)		 32 32 CLKIN cycles
tASTART Analog startup time (AVDD step up to 4.5 V with DVDD ≥ 3.0 V) 1 ms
AMC1305L25 AMC1305M05 AMC1305M25 tim_int_bas654.gifFigure 1. Digital Interface Timing
AMC1305L25 AMC1305M05 AMC1305M25 tim_start_bas654.gifFigure 2. Digital Interface Startup Timing