SBAS738A June   2018  – October 2018 ISO224

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Power Ratings
    6. 7.6  Insulation Specifications
    7. 7.7  Safety-Related Certifications
    8. 7.8  Safety Limiting Values
    9. 7.9  Electrical Characteristics
    10. 7.10 Switching Characteristics
    11. 7.11 Insulation Characteristics Curves
    12. 7.12 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Input
      2. 8.3.2 Input Clamp Protection Circuit
      3. 8.3.3 Isolation Channel Signal Transmission
      4. 8.3.4 Fail-Safe Output
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 What to Do and What Not to Do
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

7.12 Typical Characteristics

at TA = 25°C, VDD1 = VDD2 = 5 V, and VINP = –12 V to 12 V, unless otherwise noted.
ISO224 D003_SBAS738.gif
ISO224B
Figure 5. Input Offset Voltage Histogram
ISO224 D005_SBAS738.gif
Figure 7. Input Offset Voltage vs Low-Side Supply Voltage
ISO224 D007_SBAS738.gif
ISO224B
Figure 9. Input Offset Drift Histogram
ISO224 D009_SBAS738.gif
Figure 11. Input Bias Current vs Temperature
ISO224 D011_SBAS738.gif
ISO224B
Figure 13. Gain Error Histogram
ISO224 D013_SBAS738.gif
Figure 15. Gain Error vs High-Side Supply Voltage
ISO224 D015_SBAS738.gif
ISO224B
Figure 17. Gain Error vs Temperature
ISO224 D017_SBAS738.gif
Figure 19. Normalized Gain vs Input Frequency
ISO224 D019_SBAS738.gif
Figure 21. Output Voltage vs Input Voltage
ISO224 D021_SBAS738.gif
Figure 23. Nonlinearity vs High-Side Supply Voltage
ISO224 D023_SBAS738.gif
Figure 25. Nonlinearity vs Temperature
ISO224 D025_SBAS738.gif
Figure 27. Total Harmonic Distortion
vs Low-Side Supply Voltage
ISO224 D027_SBAS738.gif
Figure 29. Power-Supply Rejection Ratio
vs Ripple Frequency
ISO224 D029_SBAS738.gif
Figure 31. Output Common-Mode Voltage vs Temperature
ISO224 D031_SBAS738.gif
Figure 33. Low-Side Supply Current
vs Low-Side Supply Voltage
ISO224 D033_SBAS738.gif
Figure 35. Output Rise and Fall Time
vs Low-Side Supply Voltage
ISO224 D035_SBAS738.gif
ISO224B
Figure 37. VIN to VOUT Signal Delay
vs Low-Side Supply Voltage
ISO224 D037_SBAS738.gif
ISO224B
Figure 39. VIN to VOUT Signal Delay vs Temperature
ISO224 D004_SBAS738.gif
Figure 6. Input Offset Voltage vs High-Side Supply Voltage
ISO224 D006_SBAS738.gif
ISO224B
Figure 8. Input Offset Voltage vs Temperature
ISO224 D008_SBAS738.gif
Figure 10. Input Bias Current vs High-Side Supply Voltage
ISO224 D010_SBAS738.gif
ISO224B
Figure 12. Input-Referred Noise Density vs Frequency
ISO224 D012_SBAS738.gif
ISO224A
Figure 14. Gain Error Histogram
ISO224 D014_SBAS738.gif
Figure 16. Gain Error vs Low-Side Supply Voltage
ISO224 D016_SBAS738.gif
ISO224B
Figure 18. Gain Error Drift Histogram
ISO224 D018_SBAS738.gif
Figure 20. Output Phase vs Input Frequency
ISO224 D020_SBAS738.gif
Figure 22. Nonlinearity vs Input Voltage
ISO224 D022_SBAS738.gif
Figure 24. Nonlinearity vs Low-Side Supply Voltage
ISO224 D024_SBAS738.gif
Figure 26. Total Harmonic Distortion
vs High-Side Supply Voltage
ISO224 D026_SBAS738.gif
Figure 28. Total Harmonic Distortion vs Temperature
ISO224 D028_SBAS738.gif
Figure 30. Output Common-Mode Voltage
vs Low-Side Supply Voltage
ISO224 D030_SBAS738.gif
Figure 32. High-Side Supply Current
vs High-Side Supply Voltage
ISO224 D032_SBAS738.gif
Figure 34. Supply Current vs Temperature
ISO224 D034_SBAS738.gif
Figure 36. Output Rise and Fall Time vs Temperature
ISO224 D036_SBAS738.gif
ISO224A
Figure 38. VIN to VOUT Signal Delay
vs Low-Side Supply Voltage
ISO224 D038_SBAS738.gif
ISO224A
Figure 40. VIN to VOUT Signal Delay vs Temperature