SBAU374A May   2021  – May 2022 DAC12DL3200

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Low Latency Evaluation of Receive and Transmit
    2. 1.2 Related Documentation
      1.      Technical Reference Documents
      2.      TSW14DL3200EVM and ADC12DL3200EVM Operation
  4. 2Equipment
    1. 2.1 Evaluation Board Feature Identification Summary
    2. 2.2 Required Equipment
  5. 3Setup Procedure
    1. 3.1  Install the High Speed Data Converter (HSDC) Pro Software
    2. 3.2  Install the Configuration GUI Software
    3. 3.3  Connect the DAC12DL3200EVM and TSW14DL3200EVM
    4. 3.4  Connect the Power Supplies to the Boards (Power Off)
    5. 3.5  Connect the Signal Generators to the EVM (*RF Outputs Disabled Until Directed)
      1. 3.5.1 If External Clocking is Used (Optional)
    6. 3.6  Turn On the TSW14DL3200EVM 12-V Power and Connect to the PC
    7. 3.7  Turn On the DAC12DL3200EVM 5-V Power Supply and Connect to the PC
    8. 3.8  Turn On the Signal Generator RF Outputs
    9. 3.9  Open the DAC12DL3200EVM GUI and Program the DAC and Clocks for Single Channel, NRZ Mode 2 Operation
    10. 3.10 Open the HSDC Software and Load the FPGA Image to the TSW14DL3200EVM
    11. 3.11 DxSTRB Timing Adjustment
  6. 4Other Modes of Operation
    1. 4.1 Single-Channel RF Mode 2 (2nd Nyquist Zone)
    2. 4.2 Dual-Channel Output Mode 0
    3. 4.3 Dual Channel Mode1 Setup
    4. 4.4 Dual-Channel 2xRF Mode 0 DAC Setup
    5. 4.5 Direct Digital Synthesis Mode
  7. 5Register Log File
  8. 6Device Configuration
    1. 6.1 Tab Organization
    2. 6.2 Low-Level Control
  9.   A Troubleshooting the DAC12DL3200EVM
  10.   B DAC12DL3200EVM Onboard Clocking Configuration

3.11 DxSTRB Timing Adjustment

  1. By default, the current firmware used by HSDC Pro sends a square wave instead of a pulse for the DxSTR signals. The DAC requires a pulse for DxSTR that needs to be a width that is a multiple of 4 LVDS clock cycles. To correct for this, do the following in HSDC Pro GUI:
    1. Click on the Instrument Options tab located in the top left of the DAC main page.
    2. Click on IO Delay.
      GUID-20210330-CA0I-V9CP-933L-HBNQKXHSBJ5M-low.jpg Figure 3-8 IO Delay
    3. Click the Debug Features button.
    4. Enter x10000004 for the Reg Address and x8000 for the Data in the Write section as shown in Figure 3-9. Click the Write Registers button. Enter x10000004 for the RegAddress in the Read section. Click the Read Registers button. Verify x8000 was written to this address. Close this window.
      GUID-20210330-CA0I-XKM8-WTFF-CHVLRM0KVF7H-low.jpg Figure 3-9 IO Delay Register Write
      Note: These steps only need to be done once after the firmware has been loaded. If you send another pattern, you do not have to do these steps. If the TSWS14DL3200EVM is powered down or firmware is reloaded, these steps must be repeated.
    5. In the HSDC Pro GUI main page, click the Send button in the upper left to send the test tone to the DAC EVM.
    6. There should now be a 1-GHz output tone on CHA SMA connector J1.
GUID-20210330-CA0I-0JRJ-VWHR-DCPLQWC4LRZT-low.jpgFigure 3-10 DAC Channel A Output