SBAU374A May   2021  – May 2022 DAC12DL3200

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Low Latency Evaluation of Receive and Transmit
    2. 1.2 Related Documentation
      1.      Technical Reference Documents
      2.      TSW14DL3200EVM and ADC12DL3200EVM Operation
  4. 2Equipment
    1. 2.1 Evaluation Board Feature Identification Summary
    2. 2.2 Required Equipment
  5. 3Setup Procedure
    1. 3.1  Install the High Speed Data Converter (HSDC) Pro Software
    2. 3.2  Install the Configuration GUI Software
    3. 3.3  Connect the DAC12DL3200EVM and TSW14DL3200EVM
    4. 3.4  Connect the Power Supplies to the Boards (Power Off)
    5. 3.5  Connect the Signal Generators to the EVM (*RF Outputs Disabled Until Directed)
      1. 3.5.1 If External Clocking is Used (Optional)
    6. 3.6  Turn On the TSW14DL3200EVM 12-V Power and Connect to the PC
    7. 3.7  Turn On the DAC12DL3200EVM 5-V Power Supply and Connect to the PC
    8. 3.8  Turn On the Signal Generator RF Outputs
    9. 3.9  Open the DAC12DL3200EVM GUI and Program the DAC and Clocks for Single Channel, NRZ Mode 2 Operation
    10. 3.10 Open the HSDC Software and Load the FPGA Image to the TSW14DL3200EVM
    11. 3.11 DxSTRB Timing Adjustment
  6. 4Other Modes of Operation
    1. 4.1 Single-Channel RF Mode 2 (2nd Nyquist Zone)
    2. 4.2 Dual-Channel Output Mode 0
    3. 4.3 Dual Channel Mode1 Setup
    4. 4.4 Dual-Channel 2xRF Mode 0 DAC Setup
    5. 4.5 Direct Digital Synthesis Mode
  7. 5Register Log File
  8. 6Device Configuration
    1. 6.1 Tab Organization
    2. 6.2 Low-Level Control
  9.   A Troubleshooting the DAC12DL3200EVM
  10.   B DAC12DL3200EVM Onboard Clocking Configuration

3.10 Open the HSDC Software and Load the FPGA Image to the TSW14DL3200EVM

Use the following steps to open the HSDC software and load the FPGA image to the TSW14DL3200EVM:

  1. Open the HSDC Pro software.

    Click OK to confirm the serial number of the TSW14DL3200EVM device. If multiple TSWxxxxx boards are connected, select the model and serial number for the one connected to the DAC12DL3200EVM. When the EVM powers up, there is no firmware loaded in the FPGA. Click the OK button on the No firmware. Please select a device to load firmware into the board. message.

    GUID-20210330-CA0I-FXJW-MFDH-K9XGMWCJ3ZSN-low.jpg Figure 3-5 No Firmware Loaded
  2. Click on the DAC tab in the top right of the GUI.

    In the device drop-down menu, select "DAC12DL3200_MODE2_12b_sync_istrb” as illustrated in Figure 3-6.

    GUID-20210330-CA0I-MR8N-WM79-W4XSBGWMD1ZF-low.jpg Figure 3-6 Selecting DAC Mode 2
  3. When prompted, click Yes to update the firmware. After the firmware is downloaded, the configuration done LED D22 illuminates on the TSW14DL3200EVM. This is located next to the FPGA. Status LEDs D1–D5 also illuminate.
  4. In the top middle of the GUI, enter "6.4G" for the Data Rate.
  5. Set the tone center "1GHz" in the I/Q Multitone Generator window in the lower left of the GUI, .
  6. Enter the # of tones "1", also in the I/Q Multitone Generator window
  7. Click the Create Tones button.

The setup looks as shown in Figure 3-7.

GUID-20210330-CA0I-ZCC3-9HRJ-3VHWBXBRLMDM-low.jpg Figure 3-7 HSDC Pro GUI Setup