4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the INAx180-Q1 (SOT-23-5, VSSOP-8, and TSSOP-14 packages), INAx181-Q1 (SOT-23-6, VSSOP-10, and TSSOP-20 packages), and INA185-Q1 (DCK package.) The failure modes covered in this document include the typical pin-by-pin failure scenarios:

• Pin short-circuited to Ground (see Table 4-2, Table 4-6, Table 4-26, Table 4-26, Table 4-26, Table 4-26, and Table 4-26)
• Pin open-circuited (see Table 4-3, Table 4-7, Table 4-27, Table 4-27, Table 4-27, Table 4-27, and Table 4-27)
• Pin short-circuited to an adjacent pin (see Table 4-4, Table 4-8, Table 4-28, Table 4-28, Table 4-28, Table 4-28, and Table 4-28)
• Pin short-circuited to VS (see Table 4-5, Table 4-9, Table 4-29, Table 4-29, Table 4-29, Table 4-29, and Table 4-29)

Table 4-2 through Table 4-29 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

• T_A = -40°C to +125°C
• V_S = 2.7 V to 5.5 V
• V_IN+ = 12 V
• V_REF = V_S / 2 (INAx181-Q1 only)