SBOA582 November 2023 OPA2387 , OPA387 , OPA4387 , RES11A , RES11A-Q1
A common assumption in difference amplifier circuits is that the ratio of R4 and R3 is equal to the ratio of R2 and R1, as described by Equation 23.
This assumption is useful because it allows the differential gain equation to be reduced to the form in Equation 24. This is the simplified gain equation for a difference amplifier circuit.
Combining Equation 23 with Equation 20 shows that if the resistor ratios are perfectly matched, the common-mode gain (ACM) is 0 V/V, and therefore the common-mode rejection ratio of the resistor network (CMRRR) is infinite.
In practice, the variation in absolute resistance due to resistor tolerance produces mismatches between the absolute ratios of R4/R3 and R2/R1. The ratio mismatch presents an asymmetrical resistor divider effect at the amplifier's input terminals. Any common-mode input voltage is attenuated unequally between the two resistor dividers and presents as a small differential voltage which is amplified by the differential gain of the circuit, thus degrading the CMRR performance of the differential stage.
Considering a differential amplifier circuit consisting of four discrete resistors with tolerance t, the worst-case ratio matching occurs when the absolute resistor values differ from the nominal resistor values as shown in Figure 5-1 in which,
Where,
The nominal resistor ratios determine the nominal gain of the difference amplifier stage.
Where,
The contribution of resistor tolerance to the overall common-mode rejection ratio of the difference amplifier can be determined in the worst-case by combining Equation 26 through Equation 29 with Equation 22.
Applying the relationship defined in Equation 30,
Which reduces to
Standard resistor tolerances are very small, typically 1% or less, therefore it is common to further simplify the equation for t << 1. The contribution of discrete resistor tolerance to the overall CMRR of the difference amplifier for t << 1 is defined by Equation 34.
Where,