SBOSA51 December 2020 THS4567
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
AC PERFORMANCE (ICM LOOP) | ||||||
GBWP | Differential-transimpedance gain bandwidth product | VOUT = 100 mVPP | 220 | MHz | ||
Input Common-Mode control loop small-signal bandwidth | VOUT = 100 mVPP | 5 | MHz | |||
iN | Input differential current noise | f = 100 kHz, ICM loop disabled | 0.02 | pA/√Hz | ||
f= 100 kHz, output current of ICM loop, ICM_CTL (3) < 750 nA | 0.35 | |||||
f= 100 kHz, Output current of ICM loop, ICM_CTL (3) < 2.8 µA | 0.5 | |||||
f= 100 kHz, Output current of ICM loop, ICM_CTL (3) < 5.5 µA | 0.65 | |||||
f= 100 kHz, Output current of ICM loop, ICM_CTL (3) < 17 µA | 1.1 | |||||
f= 100 kHz, Output current of ICM loop, ICM_CTL (3) < 55 µA | 1.9 | |||||
DC PERFORMANCE (ICM LOOP) | ||||||
VICM(1) | VICM pin default voltage above VS– | VICM pin open (voltage measured at pin 8) | 1.4 | 1.55 | 1.75 | V |
VICM (1) | Default input common-mode voltage above VS– | VICM pin open, VICM = (VIN+ + VIN–)/2 | 1.4 | 1.55 | 1.75 | V |
ΔVICM/ΔTA | Input common-mode voltage drift | TA = –40°C to +125°C, VICM pin open | 160 | µV/°C | ||
ΔVICM/ ΔICM_CTL |
Input common-mode voltage vs. ICM_CTL current (2) (3) | ICM_CTL variation = 5 µA to 20 µA | 2 | 2.8 | 3.6 | mV/µA |
ΔVICM/ΔTA | Input common-mode voltage offset drift | TA = –40°C to +125°C, VICM pin driven to midsupply | 22 | µV/°C | ||
VIN_OS | Input common-mode offset error | VICM pin driven to midsupply, ICM_CTL = 0(2), VIN_OS = (VICM – VICM) |
–25 | ±2.5 | 25 | mV |
VICM pin DC input resistance | VICM pin driven to midsupply | 200 | kΩ | |||
VICM input high | ≤ ±20-mV shift from midsupply offset, ICM_CTL ≤ 100 µA | VS+ – 1.5 | VS+ – 1.3 | V | ||
VICM input low | ≤ ±20-mV shift from midsupply offset, ICM_CTL ≤ 100 µA | VS– + 0.8 | VS– + 1 | V | ||
ICM_OS | Input common-mode control current offset mismatch between inputs | ICM_OS = ΔI(CM_CTL, IN+/IN–)/Average ICM_CTL, ICM_CTL = 10 µA | 0.5% |