SBVS398A December   2021  – September 2022 TPS7A21

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Smart Enable (EN)
      2. 7.3.2 Low Output Noise
      3. 7.3.3 Active Discharge
      4. 7.3.4 Dropout Voltage
      5. 7.3.5 Foldback Current Limit
      6. 7.3.6 Undervoltage Lockout
      7. 7.3.7 Thermal Overload Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Functional Mode Comparison
      2. 7.4.2 Normal Operation
      3. 7.4.3 Dropout Operation
      4. 7.4.4 Disabled
  8. 8 Applications and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Recommended Capacitor Types
      2. 8.1.2 Input and Output Capacitor Requirements
      3. 8.1.3 Load Transient Response
      4. 8.1.4 Undervoltage Lockout (UVLO) Operation
      5. 8.1.5 Power Dissipation (PD)
      6. 8.1.6 Estimating Junction Temperature
      7. 8.1.7 Recommended Area For Continuous Operation
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power Dissipation and Device Operation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
        1. 8.4.1.1 DSBGA Mounting
        2. 8.4.1.2 DSBGA Light Sensitivity
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Device Nomenclature
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

5 Pin Configuration and Functions

Figure 5-1 YWD Package,4-Pin DSBGA
Table 5-1 Pin Functions: DSBGA
PINI/ODESCRIPTION
DSBGANAME
A1INIInput voltage supply. For best transient response and to minimize input impedance, use the recommended value or larger capacitor from IN to GND, as listed in the Section 6.3 table. Place the input capacitor as close to the IN and GND pins of the device as possible.
A2OUTORegulated output voltage. Connect a low-equivalent series resistance (ESR) capacitor to this pin. For best transient response, use the nominal recommended value or larger capacitor from OUT to GND. An internal 150-Ω (typical) pulldown resistor prevents a charge from remaining on OUT when the regulator is in shutdown mode (VEN< VEN(LOW)).
B1ENIEnable input. A low voltage (VEN < VEN(LOW)) on this pin turns the regulator off and discharges the output pin to GND through an internal 150-Ω pulldown resistor. A high voltage (VEN > VEN(HI)) on this pin enables the regulator output. This pin has an internal 450-kΩ pulldown resistor to hold the regulator off by default. When VEN > VEN(HI), the 450-kΩ pulldown resistor is disconnected to reduce input current.
B2GND—Common ground.