SCEA118
June 2022
AM623
,
AM625
,
AM6412
,
AM6421
,
AM6422
,
AM6441
,
AM6442
,
TXS0108E
1
1
Translate Voltages for SPI
Design Considerations
Recommended Parts
2
Translate Voltages for UART
Design Considerations
Recommended Parts
3
Translate Voltages for I2C
Design Considerations
Recommended Parts
4
Translate Voltages for GPIO
Design Considerations
Recommended Parts
5
Translate Voltages for SDIO
Design Considerations
Recommended Parts
6
Translate Voltages for RGMII
Design Considerations
Recommended Parts
7
Translate Voltages for MDIO
Design Considerations
Recommended Parts
8
Translate Voltages for a SIM Card
Design Considerations
25
Design Considerations
Board layout is critical to the success of RGMII translation; we recommend using signal integrity simulations and prototyping for any design
Use active translators for maximum data rate
Use one device for all TX signals and one for all RX signals to minimize channel-to-channel skew
See
Low Voltage Translation For SPI, UART, RGMII, JTAG Interfaces
for details regarding the performance of SN74AXC8T245 in RGMII applications
Place translators closest to the low-voltage device, if possible, to improve signal integrity
Consider source-terminating signals if sent over 12 cm (4700 mil) or longer traces
Need additional assistance? Ask our engineers a question on the
TI E2E™ Logic Support Forum