SCEU026 February   2024 SN74AVC8T245 , SN74AVC8T245-Q1 , SN74AXC8T245 , SN74AXC8T245-Q1 , SN74LVC8T245 , SN74LVC8T245-Q1 , SN74LXC8T245 , SN74LXC8T245-Q1 , TXV0106 , TXV0106-Q1 , TXV0108 , TXV0108-Q1

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Features
    2. 2.2 Hardware Description
      1. 2.2.1 Headers
      2. 2.2.2 Bypass Capacitors
      3. 2.2.3 Pull-up and Pull-down Resistors and Capacitive Loading
      4. 2.2.4 SMA Connectors
      5. 2.2.5 Set-up and Measurements
  9. 3Hardware Design Files
    1. 3.1 Schematic
    2. 3.2 PCB Layout
    3. 3.3 Bill of Materials
  10. 4Additional Information
    1.     Trademarks

2.2.3 Pull-up and Pull-down Resistors and Capacitive Loading

The DIR (applicable to the 8-ch version) and OE pins are inputs for the devices and must never be left floating. The CMOS inputs must be held at a known state, either VCC or ground, to verify proper device operation. Refer to Implications of Slow or Floating CMOS Inputs (SCBA004). The default state of the DIR pin for the EVM is referenced to VCCA using a 10 kΩ pull-up resistor while the OE pins are pulled to GND using a 10 kΩ pull-down resistors for A to B translation.

The EVM has the flexibility for pull-ups (RUA for the A-side, RUB for the B-side, RU_DIR for the direction pin, RU_OE for the OE pin), pull-downs (RDA for the A-side, RDB for the B-side, RDA_DIR for the direction pin and RD_OE for the OE pin) for the IOs and control pins, with the option of connecting the inputs and outputs to VCC using pull-up resistors, to ground using pull-down resistors, or directly to GND via jumper on the header pins.

The inputs and outputs also have the option of connecting capacitors to the outputs. For example, CLA on the A-side when translating from B to A, or CLB on the A-side when translating from A to B. Note that inputs A1, A2, A5, A6 (for TXV0106-EVM) and A2-A7 (for TXV0108-EVM) are populated with RDA1, 2, 5, 6 (TXV0106-EVM) and RDA_2 through RDA_7 (TXV0108-EVM) with 1-MΩ pull-downs as unused pins by default. Remove the populated pull-downs when using the respective IOs.

Note that, the EVMs do not have IO capacitors pre-populated.

Table 3-4 lists the populated pull-up and pull-down resistors.

Table 2-4 Pull-up and Pull-down Resistors
DevicePinPullup (10 kΩ)Pulldown (10 kΩ)Pulldown (1 MΩ)
Six Channel(1)

A1, A2, A5, A6

RDA1, RDA2, RDA5 and RDA6

OERD_OE
Eight Channel(2)A2 through A7RDA_2 through RDA_7

OE

RD_OE

DIR

RU_DIR

(1) Six channel considering TXV0106.
(2) Eighth channel considering TXV0108, SN74AVC8T245 or SN74AXC8T245.