SFFS832 September   2024 UCC27301A-Q1 , UCC27311A-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 SOIC Package
    2. 2.2 VSON Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 SOIC Package
    2. 4.2 VSON Package

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the UCC273x1A-Q1 (SOIC and VSON packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • The device operates within the conditions specified in the data sheet.
  • For SOIC, the following failure assumptions apply:
    • Short between pin one and pin eight is out of scope.
    • Short between pin four and pin five is out of scope.
    • Short to supply for HI and LI assumes a short to 5V supply.
    • Short to supply for others pins assumes a short to VDD.
  • For VSON, the following assumptions apply:
    • Short between pin one and pin ten is out of scope.
    • Short between pin five and pin six is out of scope.
    • Short to supply for HI, LI, and EN assumes a short to 5V supply.
    • Short to supply for others pins assumes a short to VDD.