SFFS868A April   2024  – December 2024 ISOM8110-Q1 , ISOM8111-Q1 , ISOM8112-Q1 , ISOM8113-Q1 , ISOM8115-Q1 , ISOM8116-Q1 , ISOM8117-Q1 , ISOM8118-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 ISOM811(0-3)-Q1 and ISOM811(5-8)-Q1 DFG Package
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 ISOM811(0-3)-Q1
    2. 4.2 ISOM811(5-8)-Q1
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the ISOM811(0-3)-Q1 and ISOM811(5-8)-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-6 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Device is operated in accordance to the Recommended Operating Conditions table in the data sheet.
  • For the ISOM811(5-8)-Q1 devices, input forward current is only applied to one of the AN/CAT pins, while the other pin provides the return path to complete the circuit when not being shorted.