SLAA998 May 2021 DAC43701 , DAC43701-Q1 , DAC53701 , DAC53701-Q1
Key Input Parameter |
Key Output Signal |
Recommended Device |
---|---|---|
GPI trigger, Values programmed in MARGIN_HIGH and MARGIN_LOW registers | DAC output transitioning from MARGIN_LOW to MARGIN_HIGH value at a programmed slew rate, current output to adjust the brightness of LED | DAC53701, DAC43701 |
Objective: Programmable LED biasing.
This circuit design describes a key application of the DACx3701 – programmable LED biasing for appliance fade-in and fade-out applications. Appliances such as toaster ovens, microwave ovens, refrigerators and clothes dryers implement door lights for monitoring the status of the function of the appliance. These door lights dim and brighten for a certain time frame when the door closes and opens, respectively. Appliance manufacturers prefer to provide a smooth-dimming transition for a better user experience. However, a microcontroller is required for such an operation, and implementing a separate microcontroller and associated software is an overhead for a heavily-commoditized appliance market. For this reason, only the high-end appliances have such features. The DACx3701 provides an easy-to-implement, low-cost way to control the slew of such lighting without the need for software.
The following images show a simplified circuit diagram of light fade-in fade-out using MOSFET based control and an external LED driver. For high-power LEDs, external LED drivers with headroom control are preferred over MOSFET-based LED control, see AN-1656 Design Challenges of Switching LED Drivers. As the following figures show, a sample use case can involve a mechanical switch coupled to the appliance door. When the door is closed, the switch is ON by default thus keeping the GPI, the general purpose input pin of the DACx3701 low. As soon as the door is opened, the switch is turned OFF, thus pulling the GPI high.
The GPI functionality is configured to margin a high-low function. Thus, a rising edge on the GPI pin takes the DAC output to the value programmed in the MARGIN-HIGH register at a slew-rate defined by the values programmed in the SLEW_RATE and CODE_STEP bits of the GENERAL_CONFIG register. The feedback loop, closed by the MOSFET ensures that VSET is equal to the DAC output (Here, DAC output means the output of the DAC ladder, not the output pin). This configuration provides a benefit of accounting for the VGS drop of the MOSFET. The LED current is given by VSET/RSET and is thus regulated by the DAC. Similarly when the appliance door is closed, the switch is now turned ON, thus pulling the GPI pin low. This high-to-low trigger on the GPI pin drives the DAC output to the value programmed in MARGIN-LOW register. This way, the LED brightening and dimming can be regulated at a specified rate using the DACx3701.
This design explains how to program the respective DAC registers to set the required LED current and to control the rate at which the LEDs become brighter or dimmer. Also included with this article is pseudocode to get started with the application. The error in LED current is also estimated based on various factors such as load resistor tolerance, DAC feedback impedance and drift in value of a particular DAC code. The power dissipation through MOSFET has been calculated to help the user choose an appropriate part based on their application.
The design procedure is laid out with the following requirements and components in mind
Choose a small VSET so that the power dissipation across RSET is minimum. While there is an option to use the DACx3701 with either an external or an internal reference, it is important to note that the DACx3701 has a single supply voltage which will also serve as a reference in the external mode. In a practical scenario, it is unlikely that a user would have a precision reference available for VDD. With the standard power supplies, the noise and accuracy of an external reference will not be at par with the internal reference of the DACx3701. It is therefore recommended to use the internal reference of the DACx3701 to have an accurate ISET.
A VSET of 1V is chosen for the bright condition. The internal reference of the device is 1.212V with optional gain settings of 1.5×, 2×, 3×, or 4×. Using the 1.5× gain setting, the DAC53701 will have an output span of (the internal reference of the DAC is trimmed to 1.212V (typical) at room temperature). This results in RSETof
The output buffer of the DAC is connected in a force-sense configuration to the MOSFET as previously shown. This configuration compensates the gate-source voltage drop caused by temperature, drain current, and aging of the MOSFET. Considering a typical gate-source voltage of 1.2V and a power supply headroom of 200mV, the VDD for the DAC must be a minimum of (1V + 1.2V + 200mV) = 2.4V. Use a standard 3.3-V or 5-V power supply for the DAC. A bipolar junction transistor (BJT) provides a much smaller base-emitter voltage drop, but a MOSFET has better matching between the drain and source currents. It is recommended to choose BJT over the MOSFET when less than 2.4-V supply voltage is available for the DAC. The fact that the power supply of the DAC should be kept at or below 5.5V imposes a constraint on the VGS across the MOSFET for higher values of VSET. The VGS of the MOSFET will change with temperature and with ISET as well. A higher ISET requires a higher VGS but a high VSET may clip the VGS and subsequently the MOSFET current due to the supply limitations of the DAC. This presents a stronger case to use a lower VSET.
Configure the MARGIN-HIGH register value to the code equivalent of 1V; that is or 0x233. The MARGIN-LOW value should be the equivalent of the dim LED current that is 10mA, which corresponds to a DAC voltage of . The code for MARGIN-LOW is or 0x11A.
The last term in the equation comes from the error in VREF . It is important to note that all the terms involved in the calculation must have the same units. While gain error and offset error are specified in %FSR (full scale error), INL is specified in LSB. With these units, the following equation is represented as:
The real gain is found from the Gain_Error based on the following formula:
For DAC53701, which is a 10-bit DAC, the full-code is 1023d and offset error is measured at 8d while for DAC43701, the full-code is 255d and the offset error is measured at 2d. In the external reference, the error in VREF emerges from the error in VDD while in the internal reference the error in VREF emerges from the internal reference of the DAC which is trimmed to have a value of 1.212V at room temperature (25°C). The trim resolution of this internal reference is around 5mV, so there can be an error of ±2.5mV.
Based on the gain setting in the internal mode, VREF is given by:
Gain settings of 1.5×, 2×, 3×, and 4× are provided and thus the error in VREF is given by:
Similarly, these errors also drift with temperature and based on the gain error drift (%FSR/°C), offset error drift (%FSR/°C) and the drift in reference (ppm/°C) across temperature, one can find out the gain error, offset error and VREF at a higher (or lower) temperature and use them in the previous equations to calculate the error at a different temperature.
The drift in the internal reference of the DAC is specified in ppm/°C (parts per million per deg. C) and its maximum value is 65 ppm/°C. Thus, the VREF at a higher (or lower) temperature is given by the following equation:
The ambient temperature is 25°C. To calculate the worst-case errors in second equation, take the maximum or minimum values of all the parameters involved to estimate the maximum or minimum error, respectively. The following table shows the minimum and maximum values of gain error, offset error, gain error drift and offset error drift for the internal mode of reference with a gain of 1.5×. The INL drift across temperature can be considered negligible in comparison to the other terms.
Offset error drift (MIN) (%FSR/C) | –2.23E-04 | Gain error drift (MIN) (%FSR/C) | –1.50E-04 | |
Offset error drift (MAX) (%FSR/C) | 2.99E-04 | Gain error drift (MAX) (%FSR/C) | –6.77E-05 | |
Offset Error Min (%FSR) | –0.2571 | Gain Error Min (%FSR) | –0.133 | |
Offset Error Max (%FSR) | 0.2698 | Gain Error Max (%FSR) | 0.09735 |
Also VREF maximum can be estimated as the ideal VREF of the following equation:
Similarly, VREF minimum can be derived by 1.818V – 0.0025V × 1.5 = 1.81425V. Putting these maximum and minimum values and considering the maximum and minimum INL as +1 and –1 LSB respectively, using the second equation yields:
ERRORCODE_MAX = 0.009719784V and VSET_MAX = 1.009264706V
ERRORCODE_MIN = –0.009804654V and VSET_MIN = 0.989740268V
Similarly, by taking the drift values from the previous table and by considering a VRFE drift of ±65ppm/°C, the following maximum and minimum errors are obtained (T1 = Tambient = 25°C) ErrorCODE_MAX_WITH_DRIFT = 0.016760781V
ERRORCODE_MIN_WITH_DRIFT = –0.01678633V
It is important to note that these errors have been calculated by adding all the maximum (or minimum) values of different errors in the same direction. In reality, this may not always be the case and some errors may diminish the effect of each other. Thus, the previous calculated errors are more pessimistic.
The feedback impedance (looking in impedance at the VFB node) as well the load resistor tolerance of RSET also has an impact on ISET. The total impedance (Rtot) at the DAC feedback node will thus be a parallel combination of RSET and RVFB given by following equation:
While RSET has a tolerance of its own, RVFB also varies from 160kΩ to 240kΩ for the internal reference gain of 1.5×. If we have an RSET with 5% tolerance, the worst-case maximum and minimum values of Rtot will be:
RTOT_MAX = 52.4885Ω
RTOT_MIN = 47.4859Ω
With the VSET_MAX, VSET_MIN, RTOT_MAX, RTOT_MIN values, we can calculate the worst-case LED currents as follows:
From the previous two equations we get the worst-case ILED_MIN and ILED_MAX as 18.8563mA and 21.254mA, respectively. The total power dissipated across the MOSFET is given by:
Where VD_MOS is the drain voltage of the MOSFET. In this application, VD_MOS will be VCC – VF where VF is the voltage drop across the diodes. VF depends on the ISET flowing through them. The relationship between Pdis and VSET is evident in the following figure showing MOSFET power dissipation and voltage set value.
If the VSET for LED bright current condition is chosen to be greater than VD_MOS/2, the power dissipation will be more when the LED dims down, that is, when the appliance door is closed. This is not a desirable condition so it is better to have VSET below VD_MOS/2, that is, (VCC – VF)/2.
It is also important to note that VCC cannot be significantly reduced to reduce the power dissipation as there is also a VF drop across the diodes to account for, and based on variation across ISET, there should be a sufficient margin to cater to changes in VF. In addition, reducing the VCC reduces the VDS of the MOSFET, and a drastic decrease in VDS demands a higher VGS to support the same ISET which may cause certain headroom issues as mentioned in the previous sections.
The CSD16342Q5A MOSFET chosen for this example has a maximum junction-to-ambient thermal resistance, RθJA of 50W/°C. With VSET of 1V, VCC of 5V and a typical VF of 2V (single LED in the chain), PDIS =
This would mean a rise of above the ambient temperature which is not much. However, care needs to be taken while dealing with higher currents.
For instance, a bright current of 200mA would give a PDIS of 400mW implying a rise of 200°C above the ambient temperature. If the ambient temperature is close to the maximum operating temperature of the MOSFET, a 200°C rise may damage it.
The test setup for appliance LED Fade-in Fade-out with GPI pin follows:
To control the system without the use of software, map the GPI pin to margin high-low operation as listed in the GPI Configuration table of the DACx3701 10-Bit and 8-Bit, Voltage-Output Smart DACs With Nonvolatile Memory and PMBus™ Compatible I2C Interface With GPI Control data sheet. The rising edge of the GPI triggers the MARGIN-HIGH output voltage, supplying 20mA of current to the LED, and the falling edge triggers the MARGIN-LOW voltage, supplying 10-mA LED current. When the DAC output is in the slewing condition, any change in the GPI state changes the direction of the slew dynamically after the ongoing SLEW_RATE time, as shown in the following figure.