SLAAE28A November   2021  – March 2022 DAC43204 , DAC53004 , DAC53204 , DAC53204W , DAC63004 , DAC63204

 

  1.   Design Objective
  2.   Design Description
  3.   Design Notes
  4.   Design Simulations
    1.     Transient Simulation Results
  5.   Register Settings
  6.   Pseudo Code Example
  7.   Design Featured Devices
  8.   Design References

Pseudo Code Example

The following shows a pseudo code sequence to program the initial register values to the NVM of the DAC53004. The values given here are for the design choices made in the Design Notes.

Pseudo Code Example for Voltage Output Configuration

1:  //SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA>  
2:  //Configure GPI for deep-sleep trigger and enable deep-sleep function
3:  WRITE GPIO-CONFIG(0x24), 0x40, 0x01 
4:  //Write DAC0 margin high code
5:  //With 16-bit left alignment 0x200 becomes 0x8000
6:  WRITE DAC-0-MARGIN-HIGH(0x01), 0x80, 0x00
7:  //Write DAC0 margin low code
8:  WRITE DAC-0-MARGIN-LOW(0x02), 0x00, 0x00
9:  //Set the CODE-SETP to 1 LSB and SLEW-RATE to 4 µs/step
10: WRITE DAC-0-FUNC-CONFIG(0x06), 0x00, 0x01
11: //Power-up voltage output on channel 0, internal reference disabled
12: WRITE COMMON-CONFIG(0x1F), 0x0F, 0xF9 
13: //Enable the GPI, save settings to NVM
14: WRITE COMMON-TRIGGER(0x20), 0x00, 0x02 

15: //Trigger for channel 0 margin high
16: WRITE COMMON-DAC-TRIG(0x21), 0x02, 0x00
17: //Trigger for channel 0 margin low
18: WRITE COMMON-DAC-TRIG(0x21), 0x04, 0x00

Pseudo Code Example for Current Output Configuration

1:  //SYNTAX: WRITE <REGISTER NAME (Hex code)>, <MSB DATA>, <LSB DATA>  
2:  //Configure GPI for deep-sleep trigger and enable deep-sleep function
3:  WRITE GPIO-CONFIG(0x24), 0x40, 0x01 
4:  //Write DAC0 margin high code
5:  //With 16-bit left alignment, 0xFF becomes 0xFF00
6:  WRITE DAC-0-MARGIN-HIGH(0x01), 0xFF, 0x00
7:  //Write DAC0 margin low code
8:  //With 16-bit left alignment, 0x80 becomes 0x8000
9:  WRITE DAC-0-MARGIN-LOW(0x02), 0x80, 0x00
10: //Set the CODE-SETP to 1 LSB and SLEW-RATE to 4 µs/step
11: WRITE DAC-0-FUNC-CONFIG(0x06), 0x00, 0x01
12: //Power-up current output on channel 0, internal reference disabled
13: WRITE COMMON-CONFIG(0x1F), 0x0F, 0xFE 
14: //Enable the GPI, save settings to NVM
15: WRITE COMMON-TRIGGER(0x20), 0x00, 0x02 

16: //Trigger for channel 0 margin high
17: WRITE COMMON-DAC-TRIG(0x21), 0x02, 0x00
18: //Trigger for channel 0 margin low
19: WRITE COMMON-DAC-TRIG(0x21), 0x04, 0x00