SLAAE71 December 2022 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507
Several clock dividers are used to configure the system clock and peripheral clocks. It is possible to further reduce the power consumption by programming the registers clock dividers to the highest values to provide the minimum required clock frequency.
Reducing the peripheral operation frequency can also help. For example, reduce the ADC sampling and conversion frequency and the UART, SPI, or I2C transmit frequency.