SLAAE76B march   2023  – june 2023 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. MSPM0G Hardware Design Check List
  5. Power Supplies in MSPM0G Devices
    1. 2.1 Digital Power Supply
    2. 2.2 Analog Power Supply
    3. 2.3 Built-in Power Supply and Voltage Reference
    4. 2.4 Recommended Decoupling Circuit for Power Supply
  6. Reset and Power Supply Supervisor
    1. 3.1 Digital Power Supply
    2. 3.2 Power Supply Supervisor
  7. Clock System
    1. 4.1 Internal Oscillators
    2. 4.2 External Oscillators
    3. 4.3 External Clock Output (CLK_OUT)
    4. 4.4 Frequency Clock Counter (FCC)
  8. Debugger
    1. 5.1 Debug port pins and Pinout
    2. 5.2 Debug Port Connection With Standard JTAG Connector
  9. Key Analog Peripherals
    1. 6.1 ADC Design Considerations
    2. 6.2 OPA Design Considerations
    3. 6.3 DAC Design Considerations
    4. 6.4 COMP Design Considerations
    5. 6.5 GPAMP Design Considerations
  10. Key Digital Peripherals
    1. 7.1 Timer Resources and Design Considerations
    2. 7.2 UART and LIN Resources and Design Considerations
    3. 7.3 MCAN Design Considerations
    4. 7.4 I2C and SPI Design Considerations
  11. GPIOs
    1. 8.1 GPIO Output Switching Speed and Load Capacitance
    2. 8.2 GPIO Current Sink and Source
    3. 8.3 High-Speed GPIOs (HSIO)
    4. 8.4 High-Drive GPIOs (HDIO)
    5. 8.5 Open-Drain GPIOs Enable 5-V Communication Without a Level Shifter
    6. 8.6 Communicate With a 1.8-V Device Without a Level Shifter
    7. 8.7 Unused Pins Connection
  12. Layout Guides
    1. 9.1 Power Supply Layout
    2. 9.2 Considerations for Ground Layout
    3. 9.3 Traces, Vias, and Other PCB Components
    4. 9.4 How to Select Board Layers and Recommended Stack-up
  13. 10Bootloader
    1. 10.1 Bootloader Introduction
    2. 10.2 Bootloader Hardware Design Considerations
      1. 10.2.1 Physical Communication interfaces
      2. 10.2.2 Hardware Invocation
  14. 11References
  15. 12Revision History

COMP Design Considerations

The MSPM0G comparator module (COMP) is an analog voltage comparator with general comparator functionality.

The COMP module includes internal and external inputs that can be used to flexibly to process analog signals. An internal temperature sensor can be used as a direct input to the COMP.

GUID-20210402-CA0I-TBDJ-TXFK-M0LVXQTM0S14-low.svg Figure 6-7 Comparator Diagram

The MSPM0G Comparator module also combine two COMP to implement a window comparator function. As shown in Figure 6-8, COMP0 and COMP1 can be configured together to create a window comparator. In this configuration, the input signal is connected to the positive terminal of the comparators connected together, and the upper and lower threshold voltages are connected to the negative terminal of the comparators.

GUID-20210402-CA0I-D73Z-VVL9-S2HCNLC6J5JW-low.svg Figure 6-8 Window Comparator Mode

The COMP module also includes a SHORT switch that can be used to build a simple sample-and-hold for the comparator.

As shown in Figure 6-9, the required sampling time is proportional to the size of the sampling capacitor (CS), the resistance of the input switches in series with the short switch (R­), and the resistance of the external source (RS). The sampling capacitor CS should be greater than 100 pF. The time constant, Tau, to charge the sampling capacitor CS can be calculated with the below equation.

T a u = ( R I + R S ) x C S

Depending on the required accuracy, use 3 to 10 Tau as the sampling time. With 3 Tau the sampling capacitor is charged to approximately 95% of the input signals voltage level, with 5 Tau it is charged to more than 99%, and with 10 Tau the sampled voltage is sufficient for 12-bit accuracy.

GUID-20210406-CA0I-7H77-1KFN-PZ8QCBMJJQGN-low.svg Figure 6-9 Comparator Short Switch