SLAAED9 November 2023 TAA5412-Q1 , TAC5311-Q1 , TAC5312-Q1 , TAC5411-Q1 , TAC5412-Q1
This register is the live Interrupt readback register 0.
Bit | Field | Type(1) | Reset | Description |
---|---|---|---|---|
7 | INT_LIVE0 | R | 0b | Interrupt due to clock error 0b = No interrupt 1b = Interrupt |
6 | INT_LIVE0 | R | 0b | Interrupt due to PLL Lock 0b = No interrupt 1b = Interrupt |
5 | INT_LIVE0 | R | 0b | Interrupt due to Boost Over Temperature 0b = No interrupt 1b = Interrupt |
4 | INT_LIVE0 | R | 0b | Interrupt due to Boost Over Current 0b = No interrupt 1b = Interrupt |
3 | INT_LIVE0 | R | 0b | Interrupt due to Boost MO 0b = No interrupt 1b = Interrupt |
2 | RESERVED | R | 0b | Reserved bit; Write only reset value |
1 | RESERVED | R | 0b | Reserved bit; Write only reset value |
0 | RESERVED | R | 0b | Reserved bit; Write only reset value |
INT_LIVE1 (P1_R66) contains the overvoltage fault status for each of the INxP pins of the device. Similarly, INT_LIVE2 (P1_R67) contains the MICBIAS faults that do not pertain to the device's self-protection features.