SLAAEF9 November   2023 MSPM0C1104 , MSPM0G3507 , MSPM0L1306

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1MSPM0 Portfolio Overview
    1. 1.1 Introduction
    2. 1.2 Portfolio Comparison of Renesas RL78 MCUs to MSPM0 MCUs
  5. 2Ecosystem And Migration
    1. 2.1 Ecosystem Comparison
      1. 2.1.1 MSPM0 Software Development Kit (MSPM0 SDK)
      2. 2.1.2 The IDE Supported By MSPM0
      3. 2.1.3 SysConfig
      4. 2.1.4 Debug Tools
      5. 2.1.5 LaunchPad
    2. 2.2 Migration Process
      1. 2.2.1 Step 1. Choose The Right MSPM0 MCU
      2. 2.2.2 Step 2. Set Up IDE And Quick Introduction of CCS
        1. 2.2.2.1 Set Up IDE
        2. 2.2.2.2 Quick Introduction of CCS
      3. 2.2.3 Step 3. Set Up MSPM0 SDK And Quick Introduction of MSPM0 SDK
        1. 2.2.3.1 Set Up MSPM0 SDK
        2. 2.2.3.2 Quick Introduction of SDK
      4. 2.2.4 Step 4. Software Evaluation
      5. 2.2.5 Step 5. PCB Board Design
      6. 2.2.6 Step 6. Mass Production
    3. 2.3 Example
  6. 3Core Architecture Comparison
    1. 3.1 CPU
    2. 3.2 Embedded Memory Comparison
      1. 3.2.1 Flash Features
      2. 3.2.2 Flash Organization
        1. 3.2.2.1 Flash Memory Regions
        2. 3.2.2.2 NONMAIN Memory of MSPM0
        3. 3.2.2.3 Flash Memory Registers of RL78
      3. 3.2.3 Embedded SRAM
    3. 3.3 Power UP and Reset Summary and Comparison
    4. 3.4 Clocks Summary and Comparison
      1. 3.4.1 Oscillators
        1. 3.4.1.1 MSPM0 Oscillators
      2. 3.4.2 Clock Signal Comparison
    5. 3.5 MSPM0 Operating Modes Summary and Comparison
      1. 3.5.1 Operating Modes Comparison
      2. 3.5.2 MSPM0 Capabilities in Lower Modes
      3. 3.5.3 Entering Lower-Power Modes
      4. 3.5.4 Low-Power Mode Code Examples
    6. 3.6 Interrupts and Events Comparison
      1. 3.6.1 Interrupts and Exceptions
        1. 3.6.1.1 Interrupt Management of RL78
        2. 3.6.1.2 Interrupt Management of MSPM0
      2. 3.6.2 Event Handler of MSPM0
      3. 3.6.3 Event Link Controller (ELC) of RL78
      4. 3.6.4 Event Management Comparison
    7. 3.7 Debug and Programming Comparison
      1. 3.7.1 Debug Comparison
      2. 3.7.2 Programming Mode Comparison
        1. 3.7.2.1 Bootstrap Loader (BSL) Programming of MSPM0
        2. 3.7.2.2 Serial Programming (Using External Device) of RL78
  7. 4Digital Peripheral Comparison
    1. 4.1 General-Purpose I/O (GPIO, IOMUX)
    2. 4.2 Universal Asynchronous Receiver-Transmitter (UART)
    3. 4.3 Serial Peripheral Interface (SPI)
    4. 4.4 Inter-Integrated Circuit (I2C)
    5. 4.5 Timers (TIMGx, TIMAx)
    6. 4.6 Windowed Watchdog Timer (WWDT)
    7. 4.7 Real-Time Clock (RTC)
  8. 5Analog Peripheral Comparison
    1. 5.1 Analog-to-Digital Converter (ADC)
    2. 5.2 Comparator (COMP)
    3. 5.3 Digital-to-Analog Converter (DAC)
    4. 5.4 Operational Amplifier (OPA)
    5. 5.5 Voltage References (VREF)

Flash Features

The MSPM0 and RL78 family of MCUs feature nonvolatile flash memory used for storing executable program code and application data. Table 3-2 shows the comparison of flash features.

Table 3-2 Comparison of Flash Features
Features RL78 MSPM0
Flash memory Program Flash RL78Gxx ranges 1 KB to 768 KB
RL78Lxx ranges 8 KB to 256 KB
RL78Ixx, RL78Hxx range 8 KB to 512 KB
RL78Fxx ranges 8 KB to 512 KB
MSPM0Gxx ranges 32 KB to 128 KB
MSPM0Lxx ranges 8 KB to 64 KB
MSPM0Cxx 8 KB or 16 KB
Data Flash RL78Gxx ranges 0 to 8 KB
RL78Lxx ranges 2 KB to 8 KB
RL78Ixx, RL78Hxx range 0 KB to 4 KB
RL78Fxx ranges 4 KB to 16 KB
Single flash size Program Flash 32 bits 64 bits
Data Flash 32 bits or 8 bits
Memory organization Block size (512 B or 1 KB)
Bank size (variable)
Most devices-2banks
I1C devices (512 KB)-3banks(1)
Sector size (1 KB)
Bank size (variable)
Device up to 256 KB-1bank
Device with>256 KB-2banks
Access 8 bits or 16 bits Single flash word (64 bits) or multiple words
Program mode Program Flash Single flash word (32 bits) Single flash word (64 bits) or multiple words
Data Flash Single flash word (32 bits or 8 bits)
Erase Block erase Sector erase
Bank erase (up to 256 KB)

Error code correction

Supported (RL78F23, F24) Supported
Write Protection Yes Yes, static and dynamic
Read Protection Yes Yes
Cycles 1000k (TYP.) 100k (lower 32 KB) or 10k (above 32 KB)
Most RL78 devices have two banks (one code bank and one data bank), and some RL78I1C devices whose code flash memory is 512 KB have three banks (two code banks and one data bank).

In addition to the flash memory features listed in the previous table, the MSPM0 flash also has the following features:

  • In-circuit program and erase supported across the entire supply voltage range.

  • Inter programming voltage generation.