SLAAEG6 November   2023 TAA5212 , TAA5412-Q1 , TAC5111 , TAC5111-Q1 , TAC5112 , TAC5112-Q1 , TAC5211 , TAC5212 , TAC5212-Q1 , TAC5311-Q1 , TAC5312-Q1 , TAC5411-Q1 , TAC5412-Q1 , TAD5112 , TAD5112-Q1 , TAD5212 , TAD5212-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Operating Modes for the Clocking
    1. 2.1 Automatic Modes of Operation
  6. 3Clocking Modes
    1. 3.1 Auto Primary BCLK Ratio
    2. 3.2 Auto Secondary BCLK Ratio
    3. 3.3 Auto MCLK Ratio
    4. 3.4 Auto MCLK Fixed
    5. 3.5 Custom Mode and Semi Automatic Mode of Operation
    6. 3.6 Additional Clocks
      1. 3.6.1 PDM Clocks
      2. 3.6.2 Boost Clock
      3. 3.6.3 SAR Clock
      4. 3.6.4 CLKOUT
  7. 4Summary

2 Operating Modes for the Clocking

Internally, the modes of operation are categorized as the following:

Auto Mode of Operation: Based on the CLK_SRC_SEL configuration B0_P0_R52[3:1], the mode can be further divided as follows:

  1. Auto Primary BCLK Ratio Mode (3’d0) – Primary ASI BCLK is selected to be the audio source clock by the user.
  2. Auto Secondary BCLK Ratio Mode (3’d2) – Secondary ASI BCLK is selected to be the audio source clock by the user.
  3. Auto MCLK Ratio Mode (3’d1 or 3’d3) – MCLK supplied at the input Pad to be user as audio source, Frequency of MCLK is Integer multiple of Fsync frequency.
  4. Auto MCLK Fixed Mode (3’d4) – MCLK supplied at the input Pad to be user as audio source, MCLK frequency has no integral relation with the Fsync frequency (PLL use is mandatory).
  5. Custom Mode of Operation CUSTOM_CLK_CFG register to 1’b1 (B0_P0_R50[0]). User Configures all the Dividers manually in this mode.
  6. Semi-Automatic mode: This is used to detect Non-audio timings automatically.